Displaying 1 result from an estimated 1 matches for "mr_base".
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r_base
2012 Jun 25
1
[PATCH 1/2] drm/nouveau/pm: Prepare for more GDDR5 MR values
...;
+ (t->odt << 2) |
+ (add_term << 4);
NV_DEBUG(ndev, "(%u) MR: %08x %08x", t->id, t->mr[0], t->mr[1]);
return 0;
@@ -783,9 +790,15 @@ nouveau_mem_timing_read(struct nouveau_device *ndev, struct nouveau_pm_memtiming
}
t->mr[0] = nv_rd32(ndev, mr_base);
- t->mr[1] = nv_rd32(ndev, mr_base + 0x04);
- t->mr[2] = nv_rd32(ndev, mr_base + 0x20);
- t->mr[3] = nv_rd32(ndev, mr_base + 0x24);
+ if (pfb->ram.type == NV_MEM_TYPE_GDDR5 &&
+ ndev->card_type >= 0xC0) {
+ for (i = 0; i < 8; i++)
+ t->mr[i+1] = nv_rd32(ndev, m...