search for: movzwl

...rch/x86/boot/head.S b/xen/arch/x86/boot/head.S index 7efa155..1790462 100644 --- a/xen/arch/x86/boot/head.S +++ b/xen/arch/x86/boot/head.S @@ -78,16 +78,19 @@ __start: cmp $0x2BADB002,%eax jne not_multiboot - /* Set up trampoline segment 64k below EBDA */ - movzwl 0x40e,%eax /* EBDA segment */ - cmp $0xa000,%eax /* sanity check (high) */ - jae 0f - cmp $0x4000,%eax /* sanity check (low) */ - jae 1f -0: - movzwl 0x413,%eax /* use base memory size on failure */ - shl...

...ax ^ <stdin>:10:2: note: with variable "A0" equal to "%rdi" orq %rdi, %rax ^ <stdin>:23:2: note: possible intended match here leal (,%rdi,4), %eax ^ or: llvm/test/CodeGen/X86/mul-constant-i16.ll:40:13: error: expected string not found in input ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ^ <stdin>:35:2: note: scanning from here movzwl 4(%esp), %ecx ^ llvm/test/CodeGen/X86/mul-constant-i16.ll:272:13: error: expected string not found in input ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ^ <stdin>:212:2: note: scanning fro...

...%2, !dbg !21 %4 = load half, half* @w, align 2, !dbg !27, !tbaa !22 %5 = fadd half %3, %4, !dbg !28 store half %5, half* @x, align 2, !dbg !29, !tbaa !22 ret void, !dbg !30 } Then SelectionDAG type legalization comes along and creates this as the final assembly pushq %rax .cfi_def_cfa_offset 16 movzwl y(%rip), %edi callq __gnu_h2f_ieee movss %xmm0, 4(%rsp) # 4-byte Spill movzwl z(%rip), %edi callq __gnu_h2f_ieee addss 4(%rsp), %xmm0 # 4-byte Folded Reload movss %xmm0, 4(%rsp) # 4-byte Spill movzwl w(%rip), %edi callq __gnu_h2f_ieee addss 4(%rsp), %xmm0 # 4-byte Folded Reload callq __gnu_f2h_ieee...

This conversation has (partially) moved on to D37896 now, but if possible I was hoping that we could perform this in DAGCombiner and remove the various target specific combines that we still have. At least ARM/AARCH64 and X86 have cases that can hopefully be generalised and removed, but there will probably be a few legality/perf issues that will occur. Simon. > On 14 Sep 2017, at 06:23,

...rax ^ <stdin>:10:2: note: with variable "A0" equal to "%rdi" orq %rdi, %rax ^ <stdin>:23:2: note: possible intended match here leal (,%rdi,4), %eax ^ or: llvm/test/CodeGen/X86/mul-constant-i16.ll:40:13: error: expected string not found in input ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ^ <stdin>:35:2: note: scanning from here movzwl 4(%esp), %ecx ^ llvm/test/CodeGen/X86/mul-constant-i16.ll:272:13: error: expected string not found in input ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ^ <stdin>:212:2: note: scanning from...

...gt; > store half %5, half* @x, align 2, !dbg !29, !tbaa !22 > > ret void, !dbg !30 > > } > > > > > > Then SelectionDAG type legalization comes along and creates this as the > final assembly > > > > pushq %rax > > .cfi_def_cfa_offset 16 > > movzwl y(%rip), %edi > > callq __gnu_h2f_ieee > > movss %xmm0, 4(%rsp) # 4-byte Spill > > movzwl z(%rip), %edi > > callq __gnu_h2f_ieee > > addss 4(%rsp), %xmm0 # 4-byte Folded Reload > > movss %xmm0, 4(%rsp) # 4-byte Spill > > movzwl w(%rip), %edi > > callq...

...e with the exact same problematic store->load mismatch which doesn't use bit-fields at all. For example: short f2(short *bfs) { *bfs &= ~0x1; g(); return *bfs; } creates the same bad sequence: movq %rdi, %rbx andb $-2, (%rdi) callq g() movzwl (%rbx), %eax On Tue, May 26, 2020 at 9:30 PM John McCall via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 26 May 2020, at 20:31, Arthur O'Dwyer wrote: > > On Tue, May 26, 2020 at 7:32 PM John McCall via cfe-dev < > cfe-dev at lists.llvm.org> wrote: > > On...

...quot;A0" equal to "%rdi" > orq %rdi, %rax > ^ > <stdin>:23:2: note: possible intended match here > leal (,%rdi,4), %eax > ^ > or: > > llvm/test/CodeGen/X86/mul-constant-i16.ll:40:13: error: expected string > not found in input > ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax > ^ > <stdin>:35:2: note: scanning from here > movzwl 4(%esp), %ecx > ^ > llvm/test/CodeGen/X86/mul-constant-i16.ll:272:13: error: expected string > not found in input > ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax > ^...

...20 at 7:32 PM John McCall via cfe-dev < cfe-dev at lists.llvm.org> wrote: > On 26 May 2020, at 18:28, Bill Wendling via llvm-dev wrote: > > [...] The store is a byte: > > > > orb $0x1,0x4a(%rbx) > > > > while the read is a word: > > > > movzwl 0x4a(%r12),%r15d > > > > The problem is that between the store and the load the value hasn't > > been retired / placed in the cache. One would expect store-to-load > > forwarding to kick in, but on x86 that doesn't happen because x86 > > requires the store to b...

...# 0xff .text .globl __unnamed_1 .align 16, 0x90 .type __unnamed_1, at function __unnamed_1: # @2 .Ltmp0: .cfi_startproc # BB#0: movd __unnamed_2+6(%rip), %xmm1 movd __unnamed_2+2(%rip), %xmm0 punpckldq %xmm1, %xmm0 # xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] movzwl __unnamed_2+8(%rip), %eax movd %eax, %xmm2 movzwl __unnamed_2+4(%rip), %eax movd %eax, %xmm1 punpckldq %xmm2, %xmm1 # xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] punpckldq %xmm1, %xmm0 # xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] movd __unnamed_3(%rip), %xmm1 movss %xmm1, %xmm0 pshufb .LCPI0_0...

...:0xd8e28b80 code segment = base 0x0, limit 0xfffff, type 0x1b = DPL 0, pres 1, def32 1, gran 1 processor eflags = interrupt enabled, resume, IOPL = 0 current process = 560 (rtadvd) kernel: type 12 trap, code=0 Stopped at sysctl_iflist+0x197: movzwl 0x24(%eax),%eax db> trace sysctl_iflist(0,d8e28b98,e,51d600,98) at sysctl_iflist+0x197 sysctl_rtsock(c054db20,d8e28cb0,4,d8e28c0c,d8e28c0c) at sysctl_rtsock+0x111 sysctl_root(0,d8e28ca8,6,d8e28c0c,c150e390) at sysctl_root+0x12a userland_sysctl(c150e390,d8e28ca8,6,0,bfbffa9c) at userland_sysctl+...

...en at rubenkerkhof.com> > --- > mbr/gptmbr.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/mbr/gptmbr.S b/mbr/gptmbr.S > index 8ab6b50..7d98aee 100644 > --- a/mbr/gptmbr.S > +++ b/mbr/gptmbr.S > @@ -213,7 +213,7 @@ found_part: > > movzwl %cx,%eax /* Length of GPT entry */ > stosl > - > + > rep; movsb /* GPT entry follows MBR entry */ > popw %si > The removal of that trailing tab character is valid change. What is needed to get the patch applied in the leading git repository? Groeten Geert Stappers...

...(skb)->same_flow; ... } Right before the "same_flow = ... ->same_flow;" statement is executed, a store is made to the bitfield at the end of a called function: NAPI_GRO_CB(skb)->same_flow = 1; The store is a byte: orb $0x1,0x4a(%rbx) while the read is a word: movzwl 0x4a(%r12),%r15d The problem is that between the store and the load the value hasn't been retired / placed in the cache. One would expect store-to-load forwarding to kick in, but on x86 that doesn't happen because x86 requires the store to be of equal or greater size than the load. So inst...

...rn return: ; preds = %if.else, %if.then %ret = phi i32 [ %r1, %if.then ], [ %r2, %if.else ] ret i32 %ret } *** asm code without instcombine: *** ~/workarea/llvm-r309240/rbuild1/bin/llc < a.ll # BB#0: # %entry movzwl (%rdi), %ecx movzbl %cl, %eax andl $1792, %ecx # imm = 0x700 addq a(%rip), %rcx cmpq $1, %rcx jne .LBB0_3 *** asm code with instcombine: *** ~/workarea/llvm-r309240/rbuild1/bin/llc < b.ll # BB#0:...

The handover protocol uses ED as partition type but the comment above it still mentions EE Signed-off-by: Ruben Kerkhof <ruben at rubenkerkhof.com> --- mbr/gptmbr.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/mbr/gptmbr.S b/mbr/gptmbr.S index 7f450d3..8ab6b50 100644 --- a/mbr/gptmbr.S +++ b/mbr/gptmbr.S @@ -194,7 +194,7 @@ found_part: pushw %di /* 80 00 00 00

...-08/xen/arch/x86/x86_64/compat/entry.S 2007-08-08 11:37:08.000000000 +0200 @@ -187,6 +187,39 @@ ENTRY(compat_post_handle_exception) movb $0,TRAPBOUNCE_flags(%rdx) jmp compat_test_all_events +ENTRY(compat_syscall) + cmpb $0,VCPU_syscall32_disables_events(%rbx) + movzwl VCPU_syscall32_sel(%rbx),%esi + movq VCPU_syscall32_addr(%rbx),%rax + setne %cl + leaq VCPU_trap_bounce(%rbx),%rdx + testl $~3,%esi + leal (,%rcx,TBF_INTERRUPT),%ecx + jz 2f +1: movq %rax,TRAPBOUNCE_eip(%rdx) + movw %si,TRAPBOUNCE_cs(%rd...

...else, %if.then >> %ret = phi i32 [ %r1, %if.then ], [ %r2, %if.else ] >> ret i32 %ret >> } >> >> *** asm code without instcombine: *** >> ~/workarea/llvm-r309240/rbuild1/bin/llc < a.ll >> # BB#0: # %entry >> movzwl (%rdi), %ecx >> movzbl %cl, %eax >> andl $1792, %ecx # imm = 0x700 >> addq a(%rip), %rcx >> cmpq $1, %rcx >> jne .LBB0_3 >> >> *** asm code with instcombine: *** >> ~/workarea/llvm-r309240/...

On Tue, Jul 31, 2012 at 8:42 AM, Cameron McInally <cameron.mcinally at nyu.edu> wrote: > Andy, > > Here is the left circular shift operator patch. I apologize to the reviewer > in advance. The patch has a good bit of fine detail. Any > comments/criticisms? > > Some caveats... > > 1) This is just the bare minimum needed to make the left circular shift > operator

...__llvm.org_bugs_show-5Fbug.cgi-3Fid-3D22473&d=CwMGaQ&c=5VD0RTtNlTh3ycd41b3MUw&r=kOsLCgQzH7N8ptZ7diJD9g&m=4GlWLa5X3i08opHX4qEinKM5A85qGzRUacht2PVZxT8&s=hdE0lOvbk0jqWq2vtN1X_3HLHfpvK-z49XSU3LyY6kU&e=> Ø We need to add a pass that replaces movb (and movw) with movzbl (and movzwl) when the destination is a register and the high bytes aren't used. I have created such a pass, and have it working in a local workspace of mine. However, I think that the way it attempts to prove that the high bytes aren't used is flawed, and so I haven't yet submitted it for communi...

...0000014 00000000 0425d5dc 0x0033ce18: 00000000 00000000 00000000 0033d15c 0x0033ce28: 00000002 0000fdea 00000000 00000000 Backtrace: =>0 0x7855753a in msvcr90 (+0x3753a) (0x0033cde0) 1 0x00951095 in kindle (+0x551094) (0x0033cec8) 2 0x0095141d in kindle (+0x55141c) (0x045aa6b8) 0x7855753a: movzwl 0x0(%edx),%eax Modules: Module Address Debug info Name (132 modules) PE 340000- 373000 Deferred ssleay32 PE 3c0000- 3ca000 Deferred qgif4 PE 400000- 1296000 Export kindle PE 12a0000- 139e000 Deferred libeay32 PE 13a0000- 14df000 Deferred qtscript4 PE...