Displaying 5 results from an estimated 5 matches for "movsx64rm32".
2008 Oct 02
6
[LLVMdev] Making Sense of ISel DAG Output
...10
> %reg1073<def> = SHUFPDrri %reg1071, %reg1072, 0 ; srcLine 10
Actrually, it's worse than this. I wanted to check to make sure something
else wasn't causing the problem but it appears to come from isel. The full
output for the DAG looks like this:
%reg1059<def> = MOVSX64rm32 %reg1033, 1, %reg0, 4, Mem:LD(4,4) [tmp163 +
0] ; srcLine 10
%reg1060<def> = MOVSDrm %reg1026, 8, %reg1059, 4294967288, Mem:LD(8,8)
[r45154 + 0] ; srcLine 10
%reg1061<def> = MOVSX64rm32 %reg1033, 1, %reg0, 0, Mem:LD(4,4) [iv.161162 +
0] ; srcLine 10
%reg1062<def> = MOVSDr...
2008 Oct 03
0
[LLVMdev] Making Sense of ISel DAG Output
...i %reg1071, %reg1072, 0 ; srcLine 10
>
> Actrually, it's worse than this. I wanted to check to make sure
> something
> else wasn't causing the problem but it appears to come from isel.
> The full
> output for the DAG looks like this:
>
> %reg1059<def> = MOVSX64rm32 %reg1033, 1, %reg0, 4, Mem:LD(4,4)
> [tmp163 +
> 0] ; srcLine 10
> %reg1060<def> = MOVSDrm %reg1026, 8, %reg1059, 4294967288,
> Mem:LD(8,8)
> [r45154 + 0] ; srcLine 10
> %reg1061<def> = MOVSX64rm32 %reg1033, 1, %reg0, 0, Mem:LD(4,4) [iv.
> 161162 +
> 0]...
2008 Oct 02
0
[LLVMdev] Making Sense of ISel DAG Output
On Thursday 02 October 2008 11:37, David Greene wrote:
> I'll try ot write a small example and send it in a bit.
Ok, here's what I'm trying to do:
let AddedComplexity = 40 in {
def : Pat<(v2f64 (vector_shuffle (v2f64 (scalar_to_vector (loadf64 addr:
$src1))),
(v2f64 (scalar_to_vector (loadf64 addr:
$src2))),
2008 Oct 02
4
[LLVMdev] Making Sense of ISel DAG Output
I'm debugging some X86 patterns and I want to understand the debug dumps from
isel better.
Here's some example output:
0x391bc40: i64,ch = load 0x3922c50, 0x391b8d0, 0x38dc530 <0x39053e0:0> <sext
i32> alignment=4 srcLineNum= 10
0x3922c50: <multiple use>
0x391bc40: <multiple use>
0x3856ab0: <multiple use>
0x3914520: i64 =
2018 Mar 01
0
[X86] API to query MCInstr operand types
...f MOV32mr (from
X86InstrInfo.td)
def MOV32mr : I<0x89, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
"mov{l}\t{$src, $dst|$dst, $src}",
[(store GR32:$src, addr:$dst)], IIC_MOV_MEM>, OpSize32;
or that of MOVSX64rm (from X86InstrExtension.td)
def MOVSX64rm32: RI<0x63, MRMSrcMem, (outs GR64:$dst), (ins i32mem:$src),
"movs{lq|xd}\t{$src, $dst|$dst, $src}",
[(set GR64:$dst, (sextloadi64i32 addr:$src))],
IIC_MOVSX>,
Sched<[WriteALULd]>, Requires<[In64BitMode]>;
Given a...