search for: movssrr

...tage, the MOVSS/INSERTPS is still required since the ADDSS alone would not be equivalent to the hardware 'movss' instruction. I then started investigating the possibility of adding a pass that runs at 'postRegAlloc' stage. Before RegAlloc it may not be safe to remove the redundant MOVSSrr because of the TwoAddressInstruction Pass; this may decide to commute the operands of the ADDSS/MULSS. It is possible to write a pass that scans through each basic block in a function looking for opportunities to fold instructions based on the following patterns: ////// B<def, tied1> =...

...ill required since the ADDSS > alone would not be equivalent to the hardware 'movss' instruction. > > I then started investigating the possibility of adding a pass that > runs at 'postRegAlloc' stage. > > Before RegAlloc it may not be safe to remove the redundant MOVSSrr > because of the TwoAddressInstruction Pass; this may decide to commute > the operands of the ADDSS/MULSS. > > It is possible to write a pass that scans through each basic block in > a function looking for opportunities to fold instructions based on the > following patterns: >...

...cy in spill code interval generation. The bug shows up when there's a copy that has its source register spilled. When the coalescer comes back around to try to coalesce the copy, the merge code complains that there are no values copied from the RHS. For example: Examining copy 256%reg1330 = MOVSSrr %reg1439<kill> MOVSSrr %reg1330<d> %reg1439 %reg1439 was created when a virtual register was spilled: Spilling register 1039 for live interval %reg1039,0 = [102,2340:0) 0 at 102 adding intervals for spills for interval: %reg1039,0 = [102,2340:0) 0 at 102 +[256,257:0) added n...