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2017 Nov 07
4
Questions about code-size optimizations in ARM backend
...]*
but then I got really confused when I started to look into the
machine-dependent optimization passes in the backend.
I get a dump with the '-print-machineinstrs' option from the
MachineFunctionPass and I can see these instructions in the beginning of
the passes
*%vreg2<def> = MOVsi %vreg1, 18, pred:14, pred:%noreg, opt:%noreg;
GPR:%vreg2,%vreg1**
** %vreg3<def> = LEApcrelJT <jt#0>, pred:14, pred:%noreg; GPR:%vreg3**
** BR_JTm %vreg2<kill>, %vreg3<kill>, 0, <jt#0>; mem:LD4[JumpTable]
GPR:%vreg2,%vreg3*
and these at the end
*%R0<def>...