search for: movmskpd

...bably no such issue as I think it doesn't have such blatantly missing shuffle instructions). But yes ptest looks like the obvious winner. For cpus not having sse41 (and there's tons of them still in use not to mention still sold) it would be nice if llvm could come up with pmovmskb/movmskps/movmskpd + test (these instructions look like they were intended for exactly that use case after all). But the <4 x i8> sign-extend solution shouldn't hurt performance too much neither, if you've got ssse3. Roland

Roland Scheidegger <sroland <at> vmware.com> writes: > This looks quite similar to something I filed a bug on (12312). Michael > Liao submitted fixes for this, so I think > if you change it to > %16 = fcmp ogt <4 x float> %15, %cr > %17 = sext <4 x i1> %16 to <4 x i32> > %18 = bitcast <4 x i32> %17 to i128 > %19 = icmp ne i128 %18, 0