search for: movlt

...39;t imagine that: $ cat t.ll define i32 @test(i32 %a, i32 %b, i32 %x, i32 %y) nounwind { %cond = icmp slt i32 %a, %b %z = select i1 %cond, i32 -1, i32 %x %s = and i32 %z, %y ret i32 %s } $ llc t.ll -o - -march=arm _test: @ @test @ BB#0: cmp r0, r1 mvn r12, #0 movlt r2, r12 and r0, r2, r3 bx lr is better than a cmp + conditional and + bx. -Chris

..., i32 %b, i32 %x, i32 %y) nounwind { > %cond = icmp slt i32 %a, %b > %z = select i1 %cond, i32 -1, i32 %x > %s = and i32 %z, %y > ret i32 %s > } > $ llc t.ll -o - -march=arm > _test: @ @test > @ BB#0: > cmp r0, r1 > mvn r12, #0 > movlt r2, r12 > and r0, r2, r3 > bx lr > > is better than a cmp + conditional and + bx. This should be cmp r0, r1 movlt.w r2, #-1 @ or mvnlt r2, #0 and.w r0, r2, r3 bx lr which we gets right in Thumb2 mode (I need to check why it's not...

On Nov 12, 2010, at 11:46 AM, Evan Cheng wrote: > > This should be > > cmp r0, r1 > movlt.w r2, #-1 @ or mvnlt r2, #0 > and.w r0, r2, r3 > bx lr > > which we gets right in Thumb2 mode (I need to check why it's not matching in ARM mode). How can we use a conditional and here? The result is either (y & -1) or (y & x), the "and" i...

...: 8124: push {r4, r6, r7, lr} 8126: add r7, sp, #8 8128: mov r4, r0 812a: ldrsb.w r0, [r2] 812e: cmp r0, #1 8130: itt lt 8132: movlt r0, #85 ; 0x55 8134: poplt {r4, r6, r7, pc} // a function return 8136: ldrb.w ip, [r1, #3] 813a: ldrb.w lr, [r4, #3] 813e: movs r0, #85 ; 0x55 8140: cmp lr, ip...

...push {r4, r6, r7, lr} > 8126: add r7, sp, #8 > 8128: mov r4, r0 > 812a: ldrsb.w r0, [r2] > 812e: cmp r0, #1 > 8130: itt lt > 8132: movlt r0, #85 ; 0x55 > 8134: poplt {r4, r6, r7, pc} // a function return > > 8136: ldrb.w ip, [r1, #3] > 813a: ldrb.w lr, [r4, #3] > 813e: movs r0, #85 ; 0x55 > 8140:...

...: 8124: push {r4, r6, r7, lr} 8126: add r7, sp, #8 8128: mov r4, r0 812a: ldrsb.w r0, [r2] 812e: cmp r0, #1 8130: itt lt 8132: movlt r0, #85 ; 0x55 8134: poplt {r4, r6, r7, pc} // a function return 8136: ldrb.w ip, [r1, #3] 813a: ldrb.w lr, [r4, #3] 813e: movs r0, #85 ; 0x55 8140: cmp lr, ip...

...r7, sp, #8 >> >> 8128: mov r4, r0 >> >> 812a: ldrsb.w r0, [r2] >> >> 812e: cmp r0, #1 >> >> 8130: itt lt >> >> 8132: movlt r0, #85 ; 0x55 >> >> 8134: poplt {r4, r6, r7, pc} // a >> function return >> >> >> >> 8136: ldrb.w ip, [r1, #3] >> >> 813a: ldrb.w lr, [r4, #3] >> >>...

...> 8126: add r7, sp, #8 > > 8128: mov r4, r0 > > 812a: ldrsb.w r0, [r2] > > 812e: cmp r0, #1 > > 8130: itt lt > > 8132: movlt r0, #85 ; 0x55 > > 8134: poplt {r4, r6, r7, pc} // a > function return > > > > 8136: ldrb.w ip, [r1, #3] > > 813a: ldrb.w lr, [r4, #3] > > 813e: movs r0, #85...

Hello, Edmund, > Is it, or should it be legal for a Flag output to be used as input by > more than one other node? It's illegal. Multiple uses of the flag output do not make any sense, this breaks the semantics of flag operands. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University

...e where the flag value generated by one instruction is to be used as input to two other instructions? For a concrete example, consider: int f(int x) { return x < 0 ? 11 : x == 0 ? 22 : 33; } I'd like this to turn into something like what I've seen from other compilers: cmp r0, #0 movlt r0, #11 bxlt lr movne r0, #33 moveq r0, #22 bx lr -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, u...

I recently filed this bug: http://llvm.org/bugs/show_bug.cgi?id=8323 It's a dodgy one because you have to patch LLVM to demonstrate it. I suspect that the cause of the problem in that "bug" is that the peephole optimisation in PerformDAGCombine results in a Flag output from one node being used as input by two other nodes in the DAG, and the scheduler then can't cope with that.

...8126: add r7, sp, #8 > > 8128: mov r4, r0 > > 812a: ldrsb.w r0, [r2] > > 812e: cmp r0, #1 > > 8130: itt lt > > 8132: movlt r0, #85 ; 0x55 > > 8134: poplt {r4, r6, r7, pc} // a function return > > > > 8136: ldrb.w ip, [r1, #3] > > 813a: ldrb.w lr, [r4, #3] > > 813e: movs r0, #8...

On Nov 10, 2010, at 11:39 PM, Chris Lattner wrote: >> > > Yeah, that's not nearly as good as "%r = and i32 %x, %y" :) > > Note that: > > %z = select i1 %cond, i32 -1, i32 %x > %s = and i32 %z, %y > > Is a "conditional and". It would be interesting to know if the ARM backend gets this as a single predicated 'and' instruction

<cc'ing llvmdev> On Nov 10, 2010, at 6:38 AM, Duncan Sands wrote: > Hi Chris, in commit 12800 you introduced the following transform: > > Implement select.ll:test12* > > This transforms code like this: > > %C = or %A, %B > %D = select %cond, %C, %A > into: > %C = select %cond, %B, 0 > %D = or %A, %C > > Since B is often a