Displaying 8 results from an estimated 8 matches for "movddup".
2009 May 01
0
[LLVMdev] RFC: AVX Pattern Specification [LONG]
...me C++ code that
looks like this:
// MatchVectorShuffle - Matches a shuffle node against the available
instructions,
// returning the lowest cost one as well as the actual cost of it.
unsigned MatchVectorShuffle(VectorShuffleSDNode *N) {
unsigned LowestCost = ~0;
if (N can be matched by movddup) {
unsigned movddupcost = ... // can be either constant, or
callback into subtarget info
if (LowestCost > movddupcost)
LowestCost = movddupcost;
operands = [whatever]
opcode = X86::MOVDDUP;
}
}
if (N can be matched by movhlps) {
unsigned movhlps...
2009 May 01
4
[LLVMdev] RFC: AVX Pattern Specification [LONG]
On Friday 01 May 2009 13:46, Chris Lattner wrote:
> Right, a lot of these problems can be solved by some nice refactoring
> stuff. I'm also hoping that some of the complexity in defining
> shuffle matching code can be helped by making the definition of the
> shuffle patterns more declarative within the td file. It would be
> really nice to say that "this shuffle does a
2009 May 05
2
[LLVMdev] RFC: AVX Pattern Specification [LONG]
On May 1, 2009, at 3:50 PM, Chris Lattner wrote:
>
> The goal is to replace the pattern fragment and the C++ code for
> X86::isMOVDDUPMask with something like:
>
> def movddup : PatFrag<(ops node:$lhs, node:$rhs),
> (vector_shuffle node:$lhs, node:$rhs,
> 0, 1, 0, 1, Cost<42>)
>
> Alternatively, the cost could be put on the instructions etc, wha...
2012 Jan 04
1
[LLVMdev] How can I compile a c source file to use SSE2 Data Movement Instructions?
...ign 8
_DA:
.quad 4599075939470750515 # double 3.000000e-01
.comm _Y,800,3 # @Y
.comm _X,800,3 # @X
gcc -S -O3 -o test2.s test.c -march=native
result:
.file "test.c"
.text
.p2align 4,,15
.globl _f
.def _f; .scl 2; .type 32; .endef
_f:
pushl %ebp
movddup _DA, %xmm2
movl %esp, %ebp
xorl %eax, %eax
.p2align 4,,10
L2:
movapd _Y(%eax), %xmm0
movapd _X(%eax), %xmm1
mulpd %xmm2, %xmm1
subpd %xmm1, %xmm0
movapd %xmm0, _Y(%eax)
addl $16, %eax
cmpl $800, %eax
jne L2
xorw %ax, %ax
leave
ret
.globl _DA
.data
.align 16
_DA:
.long 858993459
.l...
2014 Sep 10
13
[LLVMdev] Please benchmark new x86 vector shuffle lowering, planning to make it the default very soon!
On Tue, Sep 9, 2014 at 11:39 PM, Chandler Carruth <chandlerc at google.com> wrote:
> Awesome, thanks for all the information!
>
> See below:
>
> On Tue, Sep 9, 2014 at 6:13 AM, Andrea Di Biagio <andrea.dibiagio at gmail.com>
> wrote:
>>
>> You have already mentioned how the new shuffle lowering is missing
>> some features; for example, you explicitly
2013 Jul 19
0
[LLVMdev] llvm.x86.sse2.sqrt.pd not using sqrtpd, calling a function that modifies ECX
...------ next part --------------
002E00D0 push ebp
002E00D1 mov ebp,esp
002E00D3 push ebx
002E00D4 push edi
002E00D5 push esi
002E00D6 and esp,0FFFFFFF0h
002E00DC sub esp,110h
002E00E2 mov eax,dword ptr [ebp+8]
002E00E5 movddup xmm0,mmword ptr [eax+10h]
002E00EA movapd xmmword ptr [esp+80h],xmm0
002E00F3 movddup xmm0,mmword ptr [eax+8]
002E00F8 movapd xmmword ptr [esp+70h],xmm0
002E00FE movddup xmm0,mmword ptr [eax]
002E0102 movapd xmmword ptr [esp+60h],xmm0
002E0108 xorpd xmm0...
2013 Jul 19
4
[LLVMdev] SIMD instructions and memory alignment on X86
Hmm, I'm not able to get those .ll files to compile if I disable SSE and I
end up with SSE instructions(including sqrtpd) if I don't disable it.
On Thu, Jul 18, 2013 at 10:53 PM, Peter Newman <peter at uformia.com> wrote:
> Is there something specifically required to enable SSE? If it's not
> detected as available (based from the target triple?) then I don't think
2013 Jun 24
1
[LLVMdev] DebugInfo: Missing non-trivially-copyable parameters in SelectionDAG
...uild/clang/debug/bin/./FileCheck /usr/local/google/home/blaikie/dev/llvm/src/test/CodeGen/X86/vec_splat.ll -check-prefix=SSE3
--
Exit Code: 1
Command Output (stderr):
--
/usr/local/google/home/blaikie/dev/llvm/src/test/CodeGen/X86/vec_splat.ll:33:9: error: expected string not found in input
; SSE3: movddup
^
<stdin>:21:12: note: scanning from here
test_v2sd: # @test_v2sd
^
<stdin>:23:2: note: possible intended match here
movsd 12(%esp), %xmm0
^
--
********************
FAIL: LLVM :: CodeGen/X86/sibcall.ll (48 of 51)
******************** TEST 'LLVM :: CodeGen/X86/s...