search for: movc

...ld like to show just one short example which was my starting point and motivation to switch to LLVM: char foo(char a, char b, char c, char d, char e, char f) { return a + b + c + d + e + f; } This is what GCC produces (30 bytes and 18 clock cycles excluding the ret instruction) _foo: mova, [sp+14] movc, a mova, [sp+12] adda, c movc, a mova, [sp+10] adda, c movc, a mova, [sp+8] adda, c movc, a mova, [sp+6] adda, c movc, a mova, [sp+4] adda, c movr8, a ret While with I can produce the following output code (11 bytes and 5 clock cycles excluding the ret) Notice also the ABI difference (with LLVM I w...

...ld like to show just one short example which was my starting point and motivation to switch to LLVM: char foo(char a, char b, char c, char d, char e, char f) { return a + b + c + d + e + f; } This is what GCC produces (30 bytes and 18 clock cycles excluding the ret instruction) _foo: mova, [sp+14] movc, a mova, [sp+12] adda, c movc, a mova, [sp+10] adda, c movc, a mova, [sp+8] adda, c movc, a mova, [sp+6] adda, c movc, a mova, [sp+4] adda, c movr8, a ret While with I can produce the following output code (11 bytes and 5 clock cycles excluding the ret) Notice also the ABI difference (with LLVM I w...

...rs when allocating stack slots to registers. This happens only to function locals (allocas) - allocation for e.g. function arguments passed by the stack work fine. For example, the debug output of the initialization of several stack slots is the following: 1 : entry: 2 : %reg1074<def> = movC 0 3 : Store: store <fi#18>, 0, %R0<kill> 4 : Remembering SS#18 in physreg R0 5 : store <fi#18>, 0, %R0<kill> 6 : Reusing SS#18 from physreg R0 for vreg1075 instead of reloading into physreg R0 7 : store <fi#9>, 0, %R0, Mem:ST(2,2) [sig5069_nl + 0] 8 : R...

...ld like to show just one short example which was my starting point and motivation to switch to LLVM: char foo(char a, char b, char c, char d, char e, char f) { return a + b + c + d + e + f; } This is what GCC produces (30 bytes and 18 clock cycles excluding the ret instruction) _foo: mova, [sp+14] movc, a mova, [sp+12] adda, c movc, a mova, [sp+10] adda, c movc, a mova, [sp+8] adda, c movc, a mova, [sp+6] adda, c movc, a mova, [sp+4] adda, c movr8, a ret While with I can produce the following output code (11 bytes and 5 clock cycles excluding the ret) Notice also the ABI difference (with LLVM I w...

...registers. This happens only to function locals (allocas) - > allocation for e.g. function arguments passed by the stack work fine. > For example, the debug output of the initialization of several stack > slots is the following: > > 1 : entry: > 2 : %reg1074<def> = movC 0 > 3 : Store: store <fi#18>, 0, %R0<kill> > 4 : Remembering SS#18 in physreg R0 > 5 : store <fi#18>, 0, %R0<kill> > 6 : Reusing SS#18 from physreg R0 for vreg1075 instead of reloading > into physreg R0 > 7 : store <fi#9>, 0, %R0, Mem...

...rc64/syscall.S + * + * Common system-call stub; %g1 already set to syscall number + */ + + .globl __syscall_common + .type __syscall_common,#function + .align 4 +__syscall_common: + t 0x6d + bcc %xcc, 1f + sethi %hi(errno), %g4 + or %g4, %lo(errno), %g4 + st %o0,[%g4] +1: + retl + movcs %xcc, -1, %o0 diff --git a/usr/klibc/arch/sparc64/sysfork.S b/usr/klibc/arch/sparc64/sysfork.S new file mode 100644 index 0000000..2eed659 --- /dev/null +++ b/usr/klibc/arch/sparc64/sysfork.S @@ -0,0 +1,26 @@ +/* + * arch/sparc64/sysfork.S + * + * The fork and vfork system calls are special on spa...

...d3d9/tests: Add window proc tests for switching between fullscreen and windowed. wined3d: Recognize the SM4 loop opcode. wined3d: Recognize the SM4 and opcode. wined3d: Recognize the SM4 frc opcode. wined3d: Recognize the SM4 mad opcode. wined3d: Recognize the SM4 movc opcode. wined3d: Allow multiple shader instruction destination arguments. wined3d: Recognize the SM4 NULL register type. wined3d: Recognize the SM4 imul opcode. wined3d: The SM4 sincos opcode has two destination arguments. wined3d: SM4 immediate constants are typeless....

I have updated the klibc patchset based on feedback received. In particular, the patchset has been reorganized so as not to break git-bisect. Additionally, this updates the patch base to 2.6.17-git12 (d38b69689c349f35502b92e20dafb30c62d49d63) and klibc 1.4.8; the main difference on the klibc side is removal of obsolete code. This is also available as a git tree at: