Displaying 3 results from an estimated 3 matches for "movapsrm".
2008 Sep 03
0
[LLVMdev] Instruction MVT::ValueTypes
...APS vs. MOVAPD vs. MOVDQU (assuming you have a
micro-architecture where there's actually a difference), this can be
achieved by having instruction selection select the right instructions.
For example, find code like this in X86InstrSSE.td:
def : Pat<(alignedloadv2i64 addr:$src),
(MOVAPSrm addr:$src)>, Requires<[HasSSE2]>;
def : Pat<(loadv2i64 addr:$src),
(MOVUPSrm addr:$src)>, Requires<[HasSSE2]>;
and change it to not select MOVAPS for that microarchitecture, for
example.
Dan
2008 Sep 03
3
[LLVMdev] Instruction MVT::ValueTypes
On Tuesday 02 September 2008 16:47, Evan Cheng wrote:
> On Sep 2, 2008, at 10:42 AM, David Greene wrote:
> > Is there an easy way to get the MVT::ValueType of a MachineInstruction
> > MachineOperand? For example, the register operand of an x86 MOVAPD
> > should
> > have an MVT::ValueType of v2f64. A MOVAPS register operand should
> > have an
> >
2016 Nov 28
2
RFC: code size reduction in X86 by replacing EVEX with VEX encoding
Hal, that’s a good point. There are more manually-maintained tables in the X86 backend that should probably be tablegened: the memory-folding tables and ReplaceableInstrs, to name a couple.
If you have ideas on how to get these auto-generated, please let us know.
From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Hal Finkel via llvm-dev
Sent: Wednesday, November 23, 2016