search for: mov_a_or

...t0: ch = EntryToken t3: ch = MOV_SU_iSSs_rspa TargetConstant:i32<64>, t0 t5: ch = MOV_SU_iSSs_rspb TargetConstant:i32<64>, t3 t8: ch = MOV_SU_iSSs_rspsu TargetConstant:i32<8>, t5 t51: ch = MOV_A_or t50, TargetGlobalAddress:i32<float* @x1> 0, t8 t49: ch = MOV_A_or t48, TargetGlobalAddress:i32<float* @x2> 0, t51 t47: ch = MOV_A_or t46, TargetGlobalAddress:i32<float* @x3> 0, t49 t45: ch = MOV_A_or t44, TargetGlobalAddress:i32<float*...

...%5:fpuaoffsetclass = LOAD_A_r @b; FPUaOffsetClass:%5 %6:fpuaroutaddregisterclass = OR_A_oo killed %5, killed %4, implicit-def dead %rflaga; FPUaROUTADDRegisterClass:%6 FPUaOffsetClass:%5,%4 %7:fpuaoffsetclass = COPY %6; FPUaOffsetClass:%7 FPUaROUTADDRegisterClass:%6 MOV_A_or killed %7, @c1; FPUaOffsetClass:%7 %8:fpuaoffsetclass = LOAD_A_r @c1; FPUaOffsetClass:%8 A virtual register %6 has been allocated for the out of the pseudo. So far, so good. My customInserter (see below) is may be over simplistic. After investigation on the code produce by my customInsert...

...           t3: ch = MOV_SU_iSSs_rspa > TargetConstant:i32<64>, t0 > >                       t5: ch = MOV_SU_iSSs_rspb TargetConstant:i32<64>, t3 > >                     t8: ch = MOV_SU_iSSs_rspsu TargetConstant:i32<8>, t5 > >                   t51: ch = MOV_A_or t50, > TargetGlobalAddress:i32<float* @x1> 0, t8 > >                 t49: ch = MOV_A_or t48, TargetGlobalAddress:i32<float* > @x2> 0, t51 > >               t47: ch = MOV_A_or t46, TargetGlobalAddress:i32<float* > @x3> 0, t49 > >             t45:...

Hi, Is there a kind of scope mechanism in the instruction lowering pattern language in order to control where instructions are inserted or how they are later reordered during the SelectionDiag linearization? I know the glue chain that stick instructions together. But such mechanism in not provided in instruction lowering pattern. I'm facing many situations where some patterns are lowered into

...3: ch = MOV_SU_iSSs_rspa > TargetConstant:i32<64>, t0 > >                       t5: ch = MOV_SU_iSSs_rspb > TargetConstant:i32<64>, t3 > >                     t8: ch = MOV_SU_iSSs_rspsu TargetConstant:i32<8>, > t5 > >                   t51: ch = MOV_A_or t50, > TargetGlobalAddress:i32<float* @x1> 0, t8 > >                 t49: ch = MOV_A_or t48, > TargetGlobalAddress:i32<float* @x2> 0, t51 > >               t47: ch = MOV_A_or t46, TargetGlobalAddress:i32<float* > @x3> 0, t49 > >             t45:...