Displaying 5 results from an estimated 5 matches for "mov8mi".
2006 Jun 26
2
[LLVMdev] Mapping bytecode to X86
...ogram here:
int main(int argc, char ** argv) {
int i, j, sum;
i = argv[0][0];
j = argv[0][1];
sum = (i + j) * j;
printf("Sum = %d\n", sum);
}
that maps to this llvm bytecode:
entry (0xa785590, LLVM BB @0xa77ebf8):
FNSTCW16m <fi#0>, 1, %NOREG, 0
MOV8mi <fi#0>, 1, %NOREG, 1, 2
FLDCW16m <fi#0>, 1, %NOREG, 0
%reg1024 = MOV32rm <fi#-2>, 1, %NOREG, 0
%reg1025 = MOV32rm %reg1024, 1, %NOREG, 0
%reg1026 = MOVSX32rm8 %reg1025, 1, %NOREG, 0
%reg1027 = MOVSX32rm8 %reg1025, 1, %NOREG, 1
ADJCAL...
2006 Jun 23
2
[LLVMdev] Help with error in pass
...--------| .bc ---------------------------------
| Live Outs: EAX
|
#include <stdio.h> | entry (0x8d4c6c0, LLVM BB @0x8d46970):
| FNSTCW16m <fi#0>, 1, %NOREG, 0
int main() { | MOV8mi <fi#0>, 1, %NOREG, 1, 2
return 0; | FLDCW16m <fi#0>, 1, %NOREG, 0
} | %reg1024 = MOV32r0
| %EAX = MOV32rr %reg1024
| RET
llc((anonymous namespace)::PrintStackTrace()+0x18)[0x88cfa30]...
2006 Jun 24
0
[LLVMdev] Help with error in pass
...-----------------------------
> | Live Outs: EAX
> |
> #include <stdio.h> | entry (0x8d4c6c0, LLVM BB @0x8d46970):
> | FNSTCW16m <fi#0>, 1, %NOREG, 0
> int main() { | MOV8mi <fi#0>, 1, %NOREG, 1, 2
> return 0; | FLDCW16m <fi#0>, 1, %NOREG, 0
> } | %reg1024 = MOV32r0
> | %EAX = MOV32rr %reg1024
> | RET
>
> llc((anonymous namespace)::PrintSta...
2006 Jun 24
1
[LLVMdev] Help with error in pass
...----
> > | Live Outs: EAX
> > |
> > #include <stdio.h> | entry (0x8d4c6c0, LLVM BB @0x8d46970):
> > | FNSTCW16m <fi#0>, 1, %NOREG, 0
> > int main() { | MOV8mi <fi#0>, 1, %NOREG, 1, 2
> > return 0; | FLDCW16m <fi#0>, 1, %NOREG, 0
> > } | %reg1024 = MOV32r0
> > | %EAX = MOV32rr %reg1024
> > | RET
> >
> > llc((...
2007 Jun 26
3
[LLVMdev] Live Intervals Question
...ied compiling a simple hello world. I don't
understand the live interval information.
Here's the machine instructions as dumped by LiveIntervalAnalysis:
********** MACHINEINSTRS **********
file hello.c line 3 b:
0 FNSTCW16m <fi#0>, 1, %NOREG, 0
FNSTCW16m <fi#0> 1 %mreg(0) 0
4 MOV8mi <fi#0>, 1, %NOREG, 1, 2
MOV8mi <fi#0> 1 %mreg(0) 1 2
8 FLDCW16m <fi#0>, 1, %NOREG, 0
FLDCW16m <fi#0> 1 %mreg(0) 0
12 ADJCALLSTACKDOWN 0, %ESP<imp-def>, %ESP<imp-use>
ADJCALLSTACKDOWN 0 %mreg(25)<d> %mreg(25)
16 %reg1024 = MOV8r0
MOV8r0 %reg1024<d>
20...