search for: morello

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2020 Jul 22
2
[RFC] Requiring explicit address space arguments for PointerType
...will significantly reduce the maintenance burden for our CHERI LLVM and should also prevent AVR issues such as e.g. https://reviews.llvm.org/rG215dc2e203341f7d1edc4c4a191b048af4ace43d Thanks, Alex [1] CHERI is currently available for MIPS and RISC-V and will soon be available on the upcoming Arm Morello board (https://developer.arm.com/architectures/cpu-architecture/a-profile/morello).
2020 Jul 24
3
[RFC] Requiring explicit address space arguments for PointerType
...>> should also prevent AVR issues such as e.g. >> https://reviews.llvm.org/rG215dc2e203341f7d1edc4c4a191b048af4ace43d >> >> Thanks, >> Alex >> >> [1] CHERI is currently available for MIPS and RISC-V and will soon be >> available on the upcoming Arm Morello board >> (https://developer.arm.com/architectures/cpu-architecture/a-profile/morello). >> _______________________________________________ >> LLVM Developers mailing list >> llvm-dev at lists.llvm.org >> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > &gt...
2020 Sep 21
2
[MTE] Globals Tagging - Discussion
> I might be missing your point here - but don't forget that the local globals are always PC-relative direct loads/stores. I did forget! Thanks for clarifying, now I understand. On Fri, 18 Sep 2020 at 20:51, Evgenii Stepanov <eugenis at google.com> wrote: > > > > On Fri, Sep 18, 2020 at 12:18 PM Mitch Phillips via llvm-dev <llvm-dev at lists.llvm.org> wrote: