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Hi Quentin, Am 08.10.20 um 21:17 schrieb Quentin Colombet: > Hi Dominik, > >> On Oct 8, 2020, at 5:03 AM, Dominik Montada >> <dominik.montada at hightec-rt.com >> <mailto:dominik.montada at hightec-rt.com>> wrote: >> >> Hi Quentin, >> >> thanks for picking up the conversation! >> >> > I think we should step back and check what we want before investing &...

...t correct? If so, I find it strange that CodeGenDAGPatterns, which parses the patterns, takes the CCReg into consideration as additional results. I am tempted to modify that part of the code, but maybe I’m missing some invariant that’s not immediately evident Cheers, Gabriel From: Dominik Montada <dominik.montada at hightec-rt.com> Sent: den 4 juni 2020 14:51 To: llvm-dev at lists.llvm.org Cc: Gabriel Hjort Åkerlund <gabriel.hjort.akerlund at ericsson.com> Subject: Re: [llvm-dev] Nested instruction patterns rejected by GlobalISel when having registers in Defs Hi Gabriel, I...

...g it. If GlobalISel were to do the same, it would solve the issue I'm having with our patterns. Best regards, Gabriel _____ From: Daniel Sanders <daniel_l_sanders at apple.com> Sent: Friday, June 5, 2020 9:02 PM To: Quentin Colombet <qcolombet at apple.com> Cc: Dominik Montada <dominik.montada at hightec-rt.com>; Gabriel Hjort Åkerlund <gabriel.hjort.akerlund at ericsson.com>; llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] Nested instruction patterns rejected by GlobalISel when having registers in Defs The implicit...

...ign a physreg > selection time, GISel copies it around/reschedule appropriately to > preserve the value. There’s a lot of wishful thinking here x). > > Cheers, > -Quentin > Best regards, Dominik -- ---------------------------------------------------------------------- Dominik Montada Email: dominik.montada at hightec-rt.com HighTec EDV-Systeme GmbH Phone: +49 681 92613 19 Europaallee 19 Fax: +49-681-92613-26 D-66113 Saarbrücken WWW: http://www.hightec-rt.com Managing Director: Vera Strothmann Register Court: Saarbrü...

...tepWithDwarf to handle this? Any help in this regard would be highly appreciated! Cheers, Dominik [1] https://llvm.org/docs/ExceptionHandling.html [2] https://www.nongnu.org/libunwind/man/unw_getcontext(3).html -- ---------------------------------------------------------------------- Dominik Montada Email: dominik.montada at hightec-rt.com HighTec EDV-Systeme GmbH Phone: +49 681 92613 19 Europaallee 19 Fax: +49-681-92613-26 D-66113 Saarbrücken WWW: http://www.hightec-rt.com Managing Director: Vera Strothmann Register Court: Saarbrü...

...00 [libc++abi] Allow specifying custom Lit config files This is the libc++abi counterpart of 0c66af970c80. Louis > On Jun 25, 2020, at 11:28, Louis Dionne via libcxx-dev <libcxx-dev at lists.llvm.org> wrote: > > > >> On Jun 25, 2020, at 08:14, Dominik Montada <dominik.montada at hightec-rt.com> wrote: >> >> Hi Louis, >> >> sorry for bothering you once more about the libcxx test suite! I was wondering whether you could help with some of my problems again. >> >> After the recent discussion on the mailing list a...

...[1] https://reviews.llvm.org/D76483 [2] https://reviews.llvm.org/D29014 P.S.: is there really no way to disable a single pass from command line? We would like to disable the DivRemPairs pass as a first workaround. -- ---------------------------------------------------------------------- Dominik Montada Email: dominik.montada at hightec-rt.com HighTec EDV-Systeme GmbH Phone: +49 681 92613 19 Europaallee 19 Fax: +49-681-92613-26 D-66113 Saarbrücken WWW: http://www.hightec-rt.com Managing Director: Vera Strothmann Register Court: Saarbrü...

...some of our legalization rules then! I also posted some questions further down below. I would appreciate getting your opinion on them. > Hi Dominik, > > I’ll do a brief reply here and if you want more information we can talk further :). > >> On Feb 27, 2020, at 5:40 AM, Dominik Montada <dominik.montada at hightec-rt.com> wrote: >> >> Hi Quentin, Hi Amara, >> >> I was following your discussion on D75086 regarding declaring types as legal even if they are smaller than the actual register class (e.g. s16 and gpr32). We are working on a backend which onl...

Hi Matt, thanks for responding. I left a couple of comments down below. Am 24.03.20 um 18:26 schrieb Matt Arsenault: > >> On Mar 24, 2020, at 12:24, Dominik Montada via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> Hi all, >> >> recently when working with GlobalISel we have often encountered cases in the legalizer where instructions could not be narrowed because the narrowing code relies on G_UNMERGE_VALUES and therefore requ...

...e. before instruction selection, or would the best modelling be to just use the shifts and then use some pre-instruction-selection combiner to merge them to the desired target instruction? Best regards, Dominik -- ---------------------------------------------------------------------- Dominik Montada Email: dominik.montada at hightec-rt.com HighTec EDV-Systeme GmbH Phone: +49 681 92613 19 Europaallee 19 Fax: +49-681-92613-26 D-66113 Saarbrücken WWW: http://www.hightec-rt.com Managing Director: Vera Strothmann Register Court: Saarbrü...

...ed when using this. Is there a way to include those tests when running the libcxx test suite? If not, what is the recommended way to build and test those libraries when doing cross-compilation? Cheers, Dominik -- ---------------------------------------------------------------------- Dominik Montada Email: dominik.montada at hightec-rt.com HighTec EDV-Systeme GmbH Phone: +49 681 92613 19 Europaallee 19 Fax: +49-681-92613-26 D-66113 Saarbrücken WWW: http://www.hightec-rt.com Managing Director: Vera Strothmann Register Court: Saarbrü...

...mapping on the required bank vs. the cost of a cross-bank copy. Would you see this as a valid direction for RegBankSelect? Best regards, Dominik Am 07.10.20 um 19:47 schrieb Quentin Colombet: > Hi Dominik, > > Thanks for sending this! > >> On Oct 7, 2020, at 5:21 AM, Dominik Montada via llvm-dev >> <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >> >> Hi all, >> >> this is the second email for the round table follow-up, this time >> regarding the issues around the greedy RegBankSelect and alternative &g...

...ould be great to get some feedback so we know whether we can start adding support for some instructions or if we just need to rewrite some of our legalization rules using the internal knowledge. Regards, Dominik -- ---------------------------------------------------------------------- Dominik Montada Email: dominik.montada at hightec-rt.com HighTec EDV-Systeme GmbH Phone: +49 681 92613 19 Europaallee 19 Fax: +49-681-92613-26 D-66113 Saarbrücken WWW: http://www.hightec-rt.com Managing Director: Vera Strothmann Register Court: Saarbrü...

Hi, I am in the process of porting our target to GlobalISel, and have encountered a problem. Nearly all instructions in our instruction set make modifications to a CC register, and hence are defined as follows: let ..., Defs = [CCReg] in def shfts_a32_imm7: Instruction<(outs OurRC:$dst), ...>; What's more, many of these instructions have patterns where the instruction itself

Hi all, first of all thanks to Matt for hosting the round table yesterday and to everyone else for their time and the valuable discussions. As promised in the chat yesterday, here is the email regarding the legalizer / artifact combiner issue we talked about. I will send a separate email regarding the regbankselect discussion. In case someone on the list didn't attend the round table

Hi all, this is the second email for the round table follow-up, this time regarding the issues around the greedy RegBankSelect and alternative mappings. The issue I brought up was that because RegBankSelect goes top-down, it never looks at all available mappings for the operands when considering which of the mappings to apply to the current instruction. In our architecture we have one

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...Muchas gracias, Daniel e Isidro. > > El problema de este paquete, por lo que he podido leer, es que > necesitas tener MicroStrategy, y yo no tengo MicroStrategy sinó que > soy un usuario de una página web de la cual necesito descargar cada > mes unos datos, y en esa página web hay montada una infraestructura en > MicroStrategy Web para que cada usuario se descargue los datos que le interesen. > > > > Gerard Reverté > > ________________________________ > De: Isidro Hidalgo [mailto:ihidalgo en jccm.es] > Enviat: dilluns, 27 / octubre / 2014 13:49 Per a: Rev...

Sorry if I wasn't clear about my use case. In my daily dev work, I do many local "ninja check"s, or "llvm-lit" on a subdirectory as a quick(er) smoke test if I am making changes in that area (e.g. "llvm-lit ../llvm/test/CodeGen"). Nothing wrong here, as indeed nothing changed here. But in case of a test failure, I want to run just that test: bin/llvm-lit

Hi, I'm trying to use predicated TImmLeafs in TableGen patterns with GlobalISel to select intrinsics with immediate operands. While this is working so far, contrary to ImmLeafs the predicate does not seem to get checked. Is this not supported yet? This is the pattern in question: def tuimm9 : TImmLeaf<i32, [{ return isUInt<9>(Imm); }]>; def : Pat<(int_target_foo