search for: mondada

Displaying 9 results from an estimated 9 matches for "mondada".

2009 Jan 15
2
[LLVMdev] win32/llvm.sln, win32/clang.sln
Mondada Gabriele <g.mondada at etel.ch> writes: > I just moved to the CMake solution. By the way, the generated libs > haven't the same names. Which ones? The only difference is that we now generate .lib files where .obj were generated on the past, and require a parameter to be passed to...
2009 Jan 15
0
[LLVMdev] win32/llvm.sln, win32/clang.sln
Hi, I just moved to the CMake solution. By the way, the generated libs haven't the same names. In my opinion, we have to choose one way and remove the other one. If it helps, you can put in the win32 directory the result of CMake, or add a script that generate this win32 directory with cmake. Gab > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces
2009 Jan 15
0
[LLVMdev] win32/llvm.sln, win32/clang.sln
> > I just moved to the CMake solution. By the way, the generated libs > > haven't the same names. > > Which ones? The only difference is that we now generate .lib files > where > .obj were generated on the past, and require a parameter to be passed > to > the linker for including them on the final executable. I was linking with VMCore.lib support.lib
2009 Jan 27
2
[LLVMdev] Can TargetInstrInfo::storeRegToStackSlot use temp/virtual regs?
Dan Gohman a écrit : > On Jan 23, 2009, at 3:28 AM, Mondada Gabriele wrote: > > >> Hi, >> I'm implementing storeRegToStackSlot() and, in order to store some >> specific registers (floating point regs and address regs) I've to >> copy them to more standard regs and copy these last ones to the slot. >> I trie...
2009 Jan 26
0
[LLVMdev] Can TargetInstrInfo::storeRegToStackSlot use temp/virtual regs?
On Jan 23, 2009, at 3:28 AM, Mondada Gabriele wrote: > Hi, > I'm implementing storeRegToStackSlot() and, in order to store some > specific registers (floating point regs and address regs) I've to > copy them to more standard regs and copy these last ones to the slot. > I tried to generate instructions that...
2009 Jan 23
2
[LLVMdev] Can TargetInstrInfo::storeRegToStackSlot use temp/virtual regs?
Hi, I'm implementing storeRegToStackSlot() and, in order to store some specific registers (floating point regs and address regs) I've to copy them to more standard regs and copy these last ones to the slot. I tried to generate instructions that use physical registers, but by doing that I overwrote registers already assigned by the register allocator. Is it possible to use virtual registers
2009 Jan 15
9
[LLVMdev] win32/llvm.sln, win32/clang.sln
Folks, Is anyone still using the Visual Studio solution files in the win32 directory? If they aren't being maintained, they should probably be removed (to avoid any confusion). Thanks for any feedback, snaroff
2009 Mar 10
2
[LLVMdev] visitBIT_CONVERT (previous Shouldn't DAGCombine insert legal nodes?)
> Historically nodes marked "custom" were considered legal, so the > DAGCombiner would have been correct to generate it. Not sure how > that ever worked though. I think Dan split the isOperationLegal > method into isOperationLegal and isOperationLegalOrCustom for reasons > related to this kind of thing. I don't know whether the DAGCombiner > is now only supposed
2009 Mar 05
2
[LLVMdev] visitBIT_CONVERT (previous Shouldn't DAGCombine insert legal nodes?)
Hello, In the combine 2 step (after legalization), in the DAGCombiner::visitBIT_CONVERT() method, the DAG combiner is replacing an FABS followed by a BIT_CONVERT, to a BIT_CONVERT followed by an AND 0x7FFFFFFFFFFFFFFF. Everything is 64 bit. On my target, FABS and BIT_CONVERT are legal in 64 bit, but AND in not legal in 64 bit (is declared custom). So the dag combiner is introducing illegal (not