search for: mnenomic

...imizing assembler" would take the .s file as its input, the structure of which will differ from one architecture to the next. Not only that, but the format of an individual assembly instruction may be nontrivial to parse. For example, Hexagon instructions don't follow the typical "mnenomic op, op, ..." format, even though the MIR representation for Hexagon does. -Krzysztof -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

Hi everyone, we've been prototyping an optimizing assembler for Hexagon for the purpose of updating legacy assembly for new architectures, packet rules, and instruction latencies. It seems like others would be interested in using this and we're looking for any related feedback: has it been attempted before, who's interested, or any general suggestions. We're using the