search for: mmu

...new simplified page kind scheme, reducing the number of possible page kinds from 256 to 16. It also is the first NVIDIA GPU in which the highest possible page kind value is not reserved as an "invalid" page kind. To address this, the invalid page kind is made an explicit property of the MMU HAL, and a new table of page kinds is added to the tu102 MMU HAL. One hardware change not addressed here is that 0x00 is technically no longer a supported page kind, and pitch surfaces are instead intended to share the block-linear generic page kind 0x06. However, because that will be a rather inv...

Hi, Generally the the imported buffers which has memory type TTM_PL_TT are mapped as small pages probably due to lack of big page allocation. But the platform device which also use memory type TTM_PL_TT, like GK20A, can *allocate* big page though the IOMMU hardware inside the SoC. This is a try to map the imported buffers as big pages in GMMU by the platform IOMMU. With some preparation work to map decreate small pages into big page(s) by IOMMU the GMMU eventually sees the imported buffer as chunks of big pages and does the mapping. And then we can p...

Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes, in particular in the context in which this code is being used. So, replace the following form: sizeof(*kind) + sizeof(*kind->data) * mmu->kind_nr; with: struct_size(kind, data, mmu->kind_nr) This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo at embeddedor.com> --- drivers/gpu/drm/nouveau/nvif/mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver...

Fixes coccicheck warning: drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h:307:2-3: Unneeded semicolon drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c:583:2-3: Unneeded semicolon Reported-by: Hulk Robot <hulkci at huawei.com> Signed-off-by: Zheng Bin <zhengbin13 at huawei.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c | 2 +- drivers/gpu/drm/nouv...

Fixes coccicheck warning: drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c:583:2-3: Unneeded semicolon drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h:307:2-3: Unneeded semicolon Reported-by: Hulk Robot <hulkci at huawei.com> Signed-off-by: zhengbin <zhengbin13 at huawei.com> --- v1->v2: add missing one space after the closing curly bracket drivers/gp...

Fixes coccicheck warning: drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c:583:2-3: Unneeded semicolon drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h:307:2-3: Unneeded semicolon Reported-by: Hulk Robot <hulkci at huawei.com> Signed-off-by: zhengbin <zhengbin13 at huawei.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c | 2 +- drivers/gpu/drm/nouve...

...PTEs needed to be pointed at "vidmem" (despite them actually accessing system memory anyway) on Tegra parts for compression to work? I could be mistaken though. Ben. > > Signed-off-by: Thierry Reding <treding at nvidia.com> > --- > drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h | 1 - > drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgk20a.c | 10 ---------- > drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm20b.c | 4 ++-- > drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp10b.c | 2 +- > 4 files changed, 3 insertions(+), 14 deletions(-) > > diff --git...

...gine/fifo/gpfifogk104.c | 7 +++-- .../nouveau/nvkm/engine/fifo/gpfifogv100.c | 5 ++-- .../gpu/drm/nouveau/nvkm/engine/fifo/gv100.c | 7 ++++- .../gpu/drm/nouveau/nvkm/subdev/bar/gf100.c | 3 +- .../gpu/drm/nouveau/nvkm/subdev/fault/gv100.c | 3 +- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h | 3 -- .../drm/nouveau/nvkm/subdev/mmu/vmmgf100.c | 21 ++------------ .../drm/nouveau/nvkm/subdev/mmu/vmmgk104.c | 2 -- .../drm/nouveau/nvkm/subdev/mmu/vmmgk20a.c | 12 -------- .../drm/nouveau/nvkm/subdev/mmu/vmmgm200.c | 2 -- .../drm/nouveau/nvkm/subdev/mmu/vmmgm20b.c...

...tariu <marian.c.rotariu at gmail.com> Co-developed-by: ?tefan ?icleru <ssicleru at bitdefender.com> Signed-off-by: ?tefan ?icleru <ssicleru at bitdefender.com> Signed-off-by: Adalbert Laz?r <alazar at bitdefender.com> --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/mmu/mmu.c | 12 ++-- arch/x86/kvm/vmx/vmx.c | 98 +++++++++++++++++++++++++++++++++ arch/x86/kvm/vmx/vmx.h | 1 + 4 files changed, 108 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index bd45778e0904..1035308940...

...OP_VCALL1(cpu.load_gs_index, gs); } -#endif static inline void write_ldt_entry(struct desc_struct *dt, int entry, const void *desc) @@ -377,10 +373,7 @@ static inline pte_t __pte(pteval_t val) { pteval_t ret; - if (sizeof(pteval_t) > sizeof(long)) - ret = PVOP_CALLEE2(pteval_t, mmu.make_pte, val, (u64)val >> 32); - else - ret = PVOP_CALLEE1(pteval_t, mmu.make_pte, val); + ret = PVOP_CALLEE1(pteval_t, mmu.make_pte, val); return (pte_t) { .pte = ret }; } @@ -389,11 +382,7 @@ static inline pteval_t pte_val(pte_t pte) { pteval_t ret; - if (sizeof(pteval_t) > s...

...oid write_ldt_entry(struct desc_struct *dt, int entry, const void *desc) @@ -375,52 +371,22 @@ static inline void paravirt_release_p4d(unsigned long pfn) static inline pte_t __pte(pteval_t val) { - pteval_t ret; - - if (sizeof(pteval_t) > sizeof(long)) - ret = PVOP_CALLEE2(pteval_t, mmu.make_pte, val, (u64)val >> 32); - else - ret = PVOP_CALLEE1(pteval_t, mmu.make_pte, val); - - return (pte_t) { .pte = ret }; + return (pte_t) { PVOP_CALLEE1(pteval_t, mmu.make_pte, val) }; } static inline pteval_t pte_val(pte_t pte) { - pteval_t ret; - - if (sizeof(pteval_t) > sizeof...

Two questions -- (a) What's the perf impact of doing this? Less work for the GPU MMU but more work for the IOMMU... (b) Would it be a good idea to do this for desktop GPUs that are on CPUs with IOMMUs in them (VT-d and whatever the AMD one is)? Is there some sort of shared API for this stuff that you should be (or are?) using? -ilia On Thu, Apr 16, 2015 at 7:06 AM, Vince Hsu &...

...| 17 -- arch/x86/kernel/paravirt_patch_32.c | 36 +-- arch/x86/xen/Kconfig | 3 +- arch/x86/xen/Makefile | 4 +- arch/x86/xen/apic.c | 17 -- arch/x86/xen/enlighten_pv.c | 45 +--- arch/x86/xen/mmu_pv.c | 326 +++------------------------- arch/x86/xen/p2m.c | 4 - arch/x86/xen/setup.c | 44 +--- arch/x86/xen/smp_pv.c | 19 +- arch/x86/xen/xen-asm.S | 14 -- arch/x86/xen/xen-as...

...| 17 -- arch/x86/kernel/paravirt_patch_32.c | 36 +-- arch/x86/xen/Kconfig | 3 +- arch/x86/xen/Makefile | 4 +- arch/x86/xen/apic.c | 17 -- arch/x86/xen/enlighten_pv.c | 45 +--- arch/x86/xen/mmu_pv.c | 326 +++------------------------- arch/x86/xen/p2m.c | 4 - arch/x86/xen/setup.c | 44 +--- arch/x86/xen/smp_pv.c | 19 +- arch/x86/xen/xen-asm.S | 14 -- arch/x86/xen/xen-as...

...the same apertures as regular GPUs. Prior to gv11b there are no checks in hardware for the aperture, so we get away with setting VRAM as the aperture for buffers that are actually in system memory. Signed-off-by: Thierry Reding <treding at nvidia.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h | 1 - drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgk20a.c | 10 ---------- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm20b.c | 4 ++-- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp10b.c | 2 +- 4 files changed, 3 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nv...

...| 18 - arch/x86/kernel/paravirt_patch.c | 17 - arch/x86/xen/Kconfig | 3 +- arch/x86/xen/Makefile | 3 +- arch/x86/xen/apic.c | 17 - arch/x86/xen/enlighten_pv.c | 78 +--- arch/x86/xen/mmu_pv.c | 488 ++++---------------- arch/x86/xen/p2m.c | 6 +- arch/x86/xen/setup.c | 36 +- arch/x86/xen/smp_pv.c | 18 - arch/x86/xen/vdso.h | 6 - arch/x86/xen/xen-asm.S...

...uce new config option PARAVIRT_XXL x86/paravirt: move items in pv_info under PARAVIRT_XXL umbrella x86/paravirt: move the Xen-only pv_cpu_ops under the PARAVIRT_XXL umbrella x86/paravirt: move the Xen-only pv_irq_ops under the PARAVIRT_XXL umbrella x86/paravirt: move the Xen-only pv_mmu_ops under the PARAVIRT_XXL umbrella x86/paravirt: remove unneeded mmu related paravirt ops bits arch/x86/Kconfig | 3 + arch/x86/hyperv/mmu.c | 4 +- arch/x86/include/asm/debugreg.h | 2 +- arch/x86/include/asm/desc.h...

The functions nvkm_vmm_ctor() and nvkm_mmu_ptp_get() are not called outside of the file defining them so make them static. Signed-off-by: Ralph Campbell <rcampbell at nvidia.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/v...

...ith patch 1 from the original series (the fix to mm/migrate.c). It is safe to apply these changes before the fix to mm/migrate.c though. Ralph Campbell (3): nouveau: fix migrate page regression nouveau: fix mixed normal and device private page migration nouveau: make nvkm_vmm_ctor() and nvkm_mmu_ptp_get() static drivers/gpu/drm/nouveau/nouveau_dmem.c | 10 +++++++++- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h | 3 --- 4 files changed, 11 insertions(+), 6 deletions(...

On 2019/3/14 ??6:42, Michael S. Tsirkin wrote: >>>>> Which means after we fix vhost to add the flush_dcache_page after >>>>> kunmap, Parisc will get a double hit (but it also means Parisc >>>>> was the only one of those archs needed explicit cache flushes, >>>>> where vhost worked correctly so far.. so it kinds of proofs your