search for: mmio_base

...nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index 8ebbe1656..37589f365 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++ b/drm/nouveau/nvkm/engine/device/base.c @@ -2935,7 +2935,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func, struct nvkm_subdev *subdev; u64 mmio_base, mmio_size; u32 boot0, strap; - void __iomem *map; + void __iomem *map = NULL; int ret = -EEXIST, i; unsigned chipset; @@ -2961,12 +2961,17 @@ nvkm_device_ctor(const struct nvkm_device_func *func, mmio_base = device->func->resource_addr(device, 0); mmio_size = device->func->...

This patch set adds basic supports for amd next generation iommu (IOMMUv2) hardware. IOMMUv2 supports various new features advertised by iommu extended feature register. It introduces guest level IO translation and supports state-of-the-art ATS/ATC devices with demand paging capability. Please refer to AMD IOMMU Architectural Specification [1] for more details. Thanks, Wei [1]

...ex 8ebbe1656..17676c75a 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++ b/drm/nouveau/nvkm/engine/device/base.c @@ -2963,7 +2963,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func, /* identify the chipset, and determine classes of subdev/engines */ if (detect) { - map = ioremap(mmio_base, 0x102000); + map = ioremap(mmio_base, mmio_size); if (ret = -ENOMEM, map == NULL) goto done; -- 2.25.2

...ex 8ebbe1656..17676c75a 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++ b/drm/nouveau/nvkm/engine/device/base.c @@ -2963,7 +2963,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func, /* identify the chipset, and determine classes of subdev/engines */ if (detect) { - map = ioremap(mmio_base, 0x102000); + map = ioremap(mmio_base, mmio_size); if (ret = -ENOMEM, map == NULL) goto done; -- 2.25.2

Hello everyone, Reposting with after having applied the (minor) fixes suggested by Wei and Jan. Allen, if you can tell us what you think about this, or suggest someone else to ask some feedback to, if you''re no longer involved with VT-d, that would be great! :-) -- As already discussed here [1], dealing with IOMMU faults in interrupt context may cause nasty things to happen, up to

...se.c b/drivers/gpu/drm/nouveau/core/engine/device/base.c index dd01c6c..a6abb51 100644 --- a/drivers/gpu/drm/nouveau/core/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/core/engine/device/base.c @@ -131,8 +131,8 @@ nouveau_devobj_ctor(struct nouveau_object *parent, if (ret) return ret; - mmio_base = pci_resource_start(device->pdev, 0); - mmio_size = pci_resource_len(device->pdev, 0); + mmio_base = nv_device_resource_start(device, 0); + mmio_size = nv_device_resource_len(device, 0); /* translate api disable mask into internal mapping */ disable = args->debug0; @@ -446,6 +446,60...

...vers/gpu/drm/nouveau/core/engine/device/base.c index dd01c6c435d6..8a8f5f2d0eb5 100644 --- a/drivers/gpu/drm/nouveau/core/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/core/engine/device/base.c @@ -131,8 +131,8 @@ nouveau_devobj_ctor(struct nouveau_object *parent, if (ret) return ret; - mmio_base = pci_resource_start(device->pdev, 0); - mmio_size = pci_resource_len(device->pdev, 0); + mmio_base = nv_device_resource_start(device, 0); + mmio_size = nv_device_resource_len(device, 0); /* translate api disable mask into internal mapping */ disable = args->debug0; @@ -446,6 +446,72...

On 12/02/14 05:38, Alexandre Courbot wrote: > Upcoming mobile Kepler GPUs (such as GK20A) use the platform bus instead > of PCI to which Nouveau is tightly dependent. This patch allows Nouveau > to handle platform devices by: > > - abstracting PCI-dependent functions that were typically used for > resource querying and page mapping, > - introducing a nv_device_is_pci()

On Mon, Feb 10, 2014 at 8:50 PM, Thierry Reding <thierry.reding at gmail.com> wrote: > On Mon, Feb 10, 2014 at 02:53:00PM +0900, Alexandre Courbot wrote: > [...] >> diff --git a/drivers/gpu/drm/nouveau/core/engine/device/base.c b/drivers/gpu/drm/nouveau/core/engine/device/base.c > [...] >> +resource_size_t >> +nv_device_resource_start(struct nouveau_device *device,

...vers/gpu/drm/nouveau/core/engine/device/base.c index dd01c6c435d6..b9f4873dcb23 100644 --- a/drivers/gpu/drm/nouveau/core/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/core/engine/device/base.c @@ -131,8 +131,8 @@ nouveau_devobj_ctor(struct nouveau_object *parent, if (ret) return ret; - mmio_base = pci_resource_start(device->pdev, 0); - mmio_size = pci_resource_len(device->pdev, 0); + mmio_base = nv_device_resource_start(device, 0); + mmio_size = nv_device_resource_len(device, 0); /* translate api disable mask into internal mapping */ disable = args->debug0; @@ -446,6 +446,72...

Hello everyone, GK20A is the Kepler-based GPU used in the upcoming Tegra K1 chips. The following patches perform architectural changes to Nouveau that are necessary to support non-PCI GPUs and add initial support for GK20A. Although the support is still very basic and more user-space changes will be needed to make the full graphics stack run on top of it, we were able to successfully open

...end failures after each debugfs entry i915/i915_pm_rpm: Show the slowest debugfs read tests/sw_sync: Fix race condition for multi-producer termination lib: Update selftests to use dynamic subtests i915/gem_softpin: Limit the noreloc test runtime i915: Start putting the mmio_base to wider use i915/gem_ctx_isolation: Check engine relative registers i915/gem_pwrite: Replace exhaustive tests with bounded probes i915/gem_exec_balancer: Bump priority of background load for hang detection i915/gem_ctx_persistence: Increase leniency for reset-timeout...