search for: mischedulertutori

...new target which is a fairly > simple in-order execution machine. > > I've been watching this presentation from a 2014 LLVM dev meeting as it > seems relevant: > > "SchedMachineModel: Adding and Optimizing a Subtarget" > http://llvm.org/devmtg/2014-10/Slides/Estes-MISchedulerTutorial.pdf > > In this presentation the author says that there have been several ways to > approach scheduling in LLVM over the years: > > - Pre 2008: SelectionDAGISel pass creates the ScheduleDAG from the > SelectionDAG at the end of instruction selection > - ScheduleDAG w...

...add instruction scheduling for a new target which is a fairly simple in-order execution machine. I've been watching this presentation from a 2014 LLVM dev meeting as it seems relevant: "SchedMachineModel: Adding and Optimizing a Subtarget" http://llvm.org/devmtg/2014-10/Slides/Estes-MISchedulerTutorial.pdf In this presentation the author says that there have been several ways to approach scheduling in LLVM over the years: * Pre 2008: SelectionDAGISel pass creates the ScheduleDAG from the SelectionDAG at the end of instruction selection * ScheduleDAG works on SelectionDAG Nodes (SDNodes...

...ULP? is it in-order or out-of-order? Hi LLVM developers, Welcome to review our work about porting GlobalISel to RISCV[7] and give us some suggestion, thanks a lot! [1] https://en.wikipedia.org/wiki/Compilers:_Principles,_Techniques,_and_Tools [2] https://llvm.org/devmtg/2014-10/Slides/Estes-MISchedulerTutorial.pdf [3] https://llvm.org/devmtg/2016-09/slides/Absar-SchedulingInOrder.pdf [4] https://youtu.be/brpomKUynEA [5] https://github.com/lowRISC/riscv-llvm/issues/27 [6] https://riscv.org/wp-content/uploads/2016/01/Wed1345-RISCV-Workshop-3-BOOM.pdf [7] http://lists.llvm.org/pipermail/llvm-dev/201...

...s on this information. In principle, should I maybe use the post-RA MI-scheduler instead of the standard post-RA scheduler (maybe also http://llvm.org/docs/doxygen/html/classllvm_1_1MachineSchedStrategy.html ) to deal with my hazards ? Following http://llvm.org/devmtg/2014-10/Slides/Estes-MISchedulerTutorial.pdf, the MI-scheduler also handles hazards, but I guess it's less documented, although the AArch64 is using it. Thank you, Alex On 2/10/2017 11:33 PM, Hal Finkel wrote: > Hi Alex, > > All of this makes sense, but are you correctly handling the Stalls argument to > get...

Hello. I am progressing a bit with difficulty with the post RA scheduler (PostRASchedulerList.cpp with ScoreboardHazardRecognizer) - the problem I have is that it doesn't advance at the next available instruction when the overridden ScoreboardHazardRecognizer::getHazardType() method returns NoopHazard and it gets stuck at the same instruction (store in my runs). Just to make sure: