search for: mipstargetmachin

Displaying 10 results from an estimated 10 matches for "mipstargetmachin".

Did you mean: mipstargetmachine
2013 Apr 01
0
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working
...ue; diff --git a/lib/Target/Mips/MipsConstantIslandPass.cpp b/lib/Target/Mips/MipsConstantIslandPass.cpp index b5de1eb..579abbf 100644 --- a/lib/Target/Mips/MipsConstantIslandPass.cpp +++ b/lib/Target/Mips/MipsConstantIslandPass.cpp @@ -80,6 +80,9 @@ FunctionPass *llvm::createMipsConstantIslandPass(MipsTargetMachine &tm) { } bool MipsConstantIslands::runOnMachineFunction(MachineFunction &F) { - return true; + // The intention is for this to be a mips16 only pass for now + if (!TM.getSubtarget<MipsSubtarget>().inMips16Mode()) + return false; + return false; } diff --git a/lib/Target...
2013 Apr 01
3
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working
On Thu, Mar 28, 2013 at 12:22 PM, Nadav Rotem <nrotem at apple.com> wrote: > IMHO the right way to handle target function attributes is to > re-initialize the target machine and TTI for every function (if the > attributes changed). Do you have another solution in mind ? I don't really understand this. TargetMachine and TTI may be quite expensive to initialize. Doing so for
2008 Mar 11
1
[LLVMdev] llvm-gcc and mips
...t; 32-bit because my arch-info program prints 4 for sizeof(int) when > compiled with the current llvm-gcc. Could it be something else I > missed? I think that "-EL" will no work, I would try changing DataLayout("E-p:32:32:32") to DataLayout("e-p:32:32:32") on MipsTargetMachine.cpp, recompile llvm, cross-compile llvm-gcc to Mips and then use cc1. -- Bruno Cardoso Lopes ( now @ Cocos Island ) http://www.brunocardoso.cc ++ The saddest aspect of life right now is that science gathers knowledge faster than society gathers wisdom + Isaac Asimov
2008 Mar 09
2
[LLVMdev] llvm-gcc and mips
Hi Kevin, > Supposed that you knew my approach was intentional (correct me if I'm > wrong), what problem did you see here? Yes, i'm trying to help raising possible problems. For example, there are Mips machines with different endianess, the llvm Mips default (Big) is different from the psp toochain default one (correct me if I'm wrong - Little), maybe this is messing up...
2008 Mar 10
0
[LLVMdev] llvm-gcc and mips
On Sun, Mar 9, 2008 at 2:05 AM, Bruno Cardoso Lopes <bruno.cardoso at gmail.com> wrote: > > Supposed that you knew my approach was intentional (correct me if I'm > > wrong), what problem did you see here? > > Yes, i'm trying to help raising possible problems. For example, there are > Mips machines with different endianess, the llvm Mips default (Big) is
2013 Mar 14
0
[LLVMdev] initial putback for implementing mips16/nomips16 attributes - please review
...nt8_t> diff --git a/lib/Target/Mips/Mips16ISelLowering.cpp b/lib/Target/Mips/Mips16ISelLowering.cpp index 6de62cf..23eb537 100644 --- a/lib/Target/Mips/Mips16ISelLowering.cpp +++ b/lib/Target/Mips/Mips16ISelLowering.cpp @@ -39,6 +39,14 @@ namespace { Mips16TargetLowering::Mips16TargetLowering(MipsTargetMachine &TM) : MipsTargetLowering(TM) { + // + // set up as if mips32 and then revert so we can test the mechanism + // for switching + addRegisterClass(MVT::i32, &Mips::CPURegsRegClass); + addRegisterClass(MVT::f32, &Mips::FGR32RegClass); + computeRegisterProperties(); + clearRegist...
2018 Sep 06
3
How to add Loongson ISA for Mips target?
Hi LLVM developers, GCC[1] is able to use Loongson ISA[2] for instruction selection: $ cat hello.c #include <stdio.h> int main(int argc, char *argv[]) { printf("Hello World\n"); return 0; } $ gcc -O0 -S hello.c $ cat hello.s .file 1 "hello.c" .section .mdebug.abi64 .previous .nan legacy .gnu_attribute 4, 1 .abicalls
2018 Sep 06
2
How to add Loongson ISA for Mips target?
- my old email address. The ISA_* classes might not be the best choice for this. There's an overall hierarchy and ordering to the ISA_* classes since they represent the generations of the MIPS ISA. If these extensions are available in Loongson chips based on MIPS32r1 and MIPS32r2 for example, it becomes difficult to describe with ISA_* classes without duplicating instruction definitions or
2013 Oct 12
3
[LLVMdev] [RFC] CodeGen Context
Hi all, This is my proposal for how to solve the problem we have with function attributes that affect code generation changing between functions. (This is mostly a problem for LTO.) Please take a look at this proposal, and let me know if you have any questions or comments. Cheers! -bw CodeGen Context =============== The back-end's
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
Hello everyone, please I need your help. To reproduce my problem I created simple pass for backends (TestPass.cpp in attached files). That pass I call from Mips backend in this way (MipsTargetMachine.cpp): bool MipsPassConfig::addPreRegAlloc() { addPass(createTestPass()); return false; } The problem becomes, when I am trying compile file ldtoa.ll (in attached files). Compiling process ends with errors from LiveIntervalsAnalysis. Everything is ok without TestPass. I don't un...