Displaying 7 results from an estimated 7 matches for "mipspassconfig".
2012 Apr 25
2
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
Hi Anton,
I ran llc with -verify-coalescing. There were no error messages.
Then I added code in MipsPassConfig::addPreEmitPass() to prevent machine
verifier from running post delay -slot-filler, and ran llc again. Again,
there were no error messages.
This is the list of passes run after post-RA scheduling. machine verifier
is run twice after post RA scheduler (and CriticalAntiDepBreaker) is run.
Pos...
2012 Apr 25
0
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
...ode in MachineVerifier.cpp wasn't written
with architectures that have delay slots in mind.
On Wed, Apr 25, 2012 at 11:59 AM, Akira Hatanaka <ahatanak at gmail.com> wrote:
> Hi Anton,
>
> I ran llc with -verify-coalescing. There were no error messages.
> Then I added code in MipsPassConfig::addPreEmitPass() to prevent machine
> verifier from running post delay -slot-filler, and ran llc again. Again,
> there were no error messages.
>
> This is the list of passes run after post-RA scheduling. machine verifier
> is run twice after post RA scheduler (and CriticalAntiDepBre...
2012 Apr 25
0
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
Hi Akira,
> When I add -verify-machineinstrs, it complains that there are instructions
> after terminator instructions.
Yes, -verify-machineinstrs and -verify-coalescing are your friends here :)
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University
2012 Apr 25
2
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
Hi Anton,
Thanks for the suggestions.
I compiled the .ll file with llc with command line options
-verify-dom-info, -verify-regalloc and -verify-loop-info.
I didn't see any diagnostic messages.
When I add -verify-machineinstrs, it complains that there are instructions
after terminator instructions.
It seems that these error messages are printed because the verifier does
not understand that
2013 Apr 01
0
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working
...amp; "null frame lowering SE");
+}
void MipsebTargetMachine::anchor() { }
MipsebTargetMachine::
@@ -102,21 +155,40 @@ TargetPassConfig *MipsTargetMachine::createPassConfig(PassManagerBase &PM) {
// Install an instruction selector pass using
// the ISelDag to gen Mips code.
bool MipsPassConfig::addInstSelector() {
- addPass(createMipsISelDag(getMipsTargetMachine()));
+ if (getMipsSubtarget().allowMixed16_32()) {
+ addPass(createMipsModuleISelDag(getMipsTargetMachine()));
+ addPass(createMips16ISelDag(getMipsTargetMachine()));
+ addPass(createMipsSEISelDag(getMipsTargetMachine(...
2013 Apr 01
3
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working
On Thu, Mar 28, 2013 at 12:22 PM, Nadav Rotem <nrotem at apple.com> wrote:
> IMHO the right way to handle target function attributes is to
> re-initialize the target machine and TTI for every function (if the
> attributes changed). Do you have another solution in mind ?
I don't really understand this.
TargetMachine and TTI may be quite expensive to initialize. Doing so for
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
Hello everyone,
please I need your help.
To reproduce my problem I created simple pass for backends (TestPass.cpp
in attached files). That pass I call from Mips backend in this way
(MipsTargetMachine.cpp):
bool MipsPassConfig::addPreRegAlloc() {
addPass(createTestPass());
return false;
}
The problem becomes, when I am trying compile file ldtoa.ll (in attached
files). Compiling process ends with errors from LiveIntervalsAnalysis.
Everything is ok without TestPass.
I don't understand what's going o...