Displaying 4 results from an estimated 4 matches for "mipsmsainstrinfo".
2016 Jan 22
2
meaning of $ in tablegen
...example
// Pattern fragments
def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx),
(MipsVExtractSExt node:$vec,
node:$idx, i8)>;
Taken from
https://github.com/llvm-mirror/llvm/blob/fd031a51c35d1781c066a42e221a7ae28610be3f/lib/Target/Mips/MipsMSAInstrInfo.td#L118
--
Rail Shafigulin
Software Engineer
Esencia Technologies
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2016 Oct 24
2
Instruction selection confusion at register - chooses vector register instead of scalar one
...like this:
def MSA128D: RegisterClass<"Connex", [v128i16], 32,
(sequence "Wh%u", 0, 31)>;
I also added vector store and load instructions in the style of Mips MSA - see
https://github.com/llvm-mirror/llvm/blob/master/lib/Target/Mips/MipsMSAInstrInfo.td, look
for "def ST_D", etc.
Note however that my vector unit has a separate memory space. This is why I defined
the vector store like:
class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
ValueType TyNode, RegisterOperand ROWD,...
2016 Oct 25
0
Instruction selection confusion at register - chooses vector register instead of scalar one
...like this:
def MSA128D: RegisterClass<"Connex", [v128i16], 32,
(sequence "Wh%u", 0, 31)>;
I also added vector store and load instructions in the style of Mips MSA - see
https://github.com/llvm-mirror/llvm/blob/master/lib/Target/Mips/MipsMSAInstrInfo.td, look
for "def ST_D", etc.
Note however that my vector unit has a separate memory space. This is why I defined
the vector store like:
class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
ValueType TyNode, RegisterOperand ROWD,...
2016 Apr 29
3
Assert in TargetLoweringBase.cpp
This post is related to the following post
http://lists.llvm.org/pipermail/llvm-dev/2016-April/098823.html
I'm still trying to compile a library with clang. But now I'm getting as
assert in
lib/CodeGen/TargetLoweringBase.cpp:1155: virtual llvm::EVT
llvm::TargetLoweringBase::getSetCCResultType(llvm::LLVMContext&, llvm::EVT)
const: Assertion `!VT.isVector() && "No default