search for: mipsmcasminfo

Displaying 15 results from an estimated 15 matches for "mipsmcasminfo".

2016 Jun 29
0
Representing MIPS ABI information in the triple as ARM/X86 do for EABI/EABIHF/X32
...r the MIPS O32 ABI, I'm now trying to do the same thing for the MIPS N64 ABI. Unfortunately, it is not currently possible to enable IAS by default for the N64 ABI without also enabling it for the N32 ABI because this information is not reflected in the triple and that's the only information MipsMCAsmInfo has. What would it take to pass more information to MipsMCAsmInfo? > For MIPS, I'm defining Triple::GNUABI32, Triple::GNUABIN32, and Triple::GNUABI64. All three of these are supported by tools like binutils (by virtue of a wildcard match '*linux-gnu*') and of these three, Triple::G...
2015 Sep 23
2
The Trouble with Triples
...to be addressed and are completely unrelated to the MC layer. ABI Let's start at ExecuteAssembler() in cc1as_main.cpp. Here's a sketch of what happens: * Call TargetRegistry::lookupTarget() to get a llvm::Target. * Call createMCRegInfo(Triple, ...) * Call createMCAsmInfo(..., Triple) * MipsMCAsmInfo::PointerSize is incorrect for the N32 ABI (should be 4 but gets 8 since it checks for Triple::mips64/mips64el) * MipsMCAsmInfo::CalleeSaveStackSlotSize is incorrect for mips-linux-gnu –mips64 –mabi=64. Since it too checks for Triple::mips64/mips64el * MipsMCAsmInfo::PrivateLabelPrefix and MipsM...
2015 Sep 23
2
The Trouble with Triples
...to be addressed and are completely unrelated to the MC layer. ABI Let's start at ExecuteAssembler() in cc1as_main.cpp. Here's a sketch of what happens: * Call TargetRegistry::lookupTarget() to get a llvm::Target. * Call createMCRegInfo(Triple, ...) * Call createMCAsmInfo(..., Triple) * MipsMCAsmInfo::PointerSize is incorrect for the N32 ABI (should be 4 but gets 8 since it checks for Triple::mips64/mips64el) * MipsMCAsmInfo::CalleeSaveStackSlotSize is incorrect for mips-linux-gnu –mips64 –mabi=64. Since it too checks for Triple::mips64/mips64el * MipsMCAsmInfo::PrivateLabelPrefix and MipsM...
2015 Sep 23
4
The Trouble with Triples
...to be addressed and are completely unrelated to the MC layer. ABI Let's start at ExecuteAssembler() in cc1as_main.cpp. Here's a sketch of what happens: * Call TargetRegistry::lookupTarget() to get a llvm::Target. * Call createMCRegInfo(Triple, ...) * Call createMCAsmInfo(..., Triple) * MipsMCAsmInfo::PointerSize is incorrect for the N32 ABI (should be 4 but gets 8 since it checks for Triple::mips64/mips64el) * MipsMCAsmInfo::CalleeSaveStackSlotSize is incorrect for mips-linux-gnu –mips64 –mabi=64. Since it too checks for Triple::mips64/mips64el * MipsMCAsmInfo::PrivateLabelPrefix and MipsM...
2016 Jun 30
1
Representing MIPS ABI information in the triple as ARM/X86 do for EABI/EABIHF/X32
...I'm now > trying to do the same thing for the MIPS N64 ABI. Unfortunately, it is not > currently possible to enable IAS by default for the N64 ABI without also > enabling it for the N32 ABI because this information is not reflected in the > triple and that's the only information MipsMCAsmInfo has. > > What would it take to pass more information to MipsMCAsmInfo? All callers of createMCAsmInfo() and LLVMCreateDisasmCPUFeatures() would need to specify the ABI. In the case of LLVMCreateDisasmCPUFeatures(), they'd move to a new variant of this function and some backward compatib...
2013 Mar 07
1
[LLVMdev] [cfe-dev] [RFC] TileGX, a new backend for Tilera's many core processor
...0, Jiong Wang wrote: > please review, thanks. configure.ac: I guess it would be preferable to not enable it by default for the moment. include/llvm/Support/FEnv.h: What is supposed to handle? Build on/for Tile? Does the platform provide fenv.h but in a broken way? lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp: Is this change intentional? Personally, I would like to see this in the tree sooner than later :) Joerg
2016 Jun 24
7
Representing MIPS ABI information in the triple as ARM/X86 do for EABI/EABIHF/X32
...r the MIPS O32 ABI, I'm now trying to do the same thing for the MIPS N64 ABI. Unfortunately, it is not currently possible to enable IAS by default for the N64 ABI without also enabling it for the N32 ABI because this information is not reflected in the triple and that's the only information MipsMCAsmInfo has. This would be fine if it N32 was also in a good state but the current N32 ABI support for IAS is badly broken and will likely take considerable effort to fix (and fixing it also requires solving the same key problem as enabling IAS for just N64). I therefore want to separate the two ABI's...
2015 Sep 23
4
The Trouble with Triples
...nArch, the new arch this mutates the triple. Otherwise it applies the –march correctly but doesn't change the triple to match. In this way, it's possible to end up with i586-linux-gnu targeting the foobar architecture. · Call createMCRegInfo() · Call createMCAsmInfo() o MipsMCAsmInfo::PointerSize is incorrect for the N32 ABI (should be 4 but gets 8 since it checks for Triple::mips64/mips64el) o MipsMCAsmInfo::CalleeSaveStackSlotSize is incorrect for mips-linux-gnu –mips64 –mabi=64. Since it too checks for Triple::mips64/mips64el o MipsMCAsmInfo::PrivateLabelPrefix and Mip...
2015 Sep 24
3
The Trouble with Triples
...to be addressed and are completely unrelated to the MC layer. ABI Let's start at ExecuteAssembler() in cc1as_main.cpp. Here's a sketch of what happens: * Call TargetRegistry::lookupTarget() to get a llvm::Target. * Call createMCRegInfo(Triple, ...) * Call createMCAsmInfo(..., Triple) * MipsMCAsmInfo::PointerSize is incorrect for the N32 ABI (should be 4 but gets 8 since it checks for Triple::mips64/mips64el) * MipsMCAsmInfo::CalleeSaveStackSlotSize is incorrect for mips-linux-gnu –mips64 –mabi=64. Since it too checks for Triple::mips64/mips64el * MipsMCAsmInfo::PrivateLabelPrefix and MipsM...
2015 Sep 23
3
The Trouble with Triples
...nArch, the new arch this mutates the triple. Otherwise it applies the –march correctly but doesn't change the triple to match. In this way, it's possible to end up with i586-linux-gnu targeting the foobar architecture. • Call createMCRegInfo() • Call createMCAsmInfo() o MipsMCAsmInfo::PointerSize is incorrect for the N32 ABI (should be 4 but gets 8 since it checks for Triple::mips64/mips64el) o MipsMCAsmInfo::CalleeSaveStackSlotSize is incorrect for mips-linux-gnu –mips64 –mabi=64. Since it too checks for Triple::mips64/mips64el o MipsMCAsmInfo::PrivateLabelPrefix and Mip...
2011 Nov 30
1
[LLVMdev] elf direct object emission
With the MIPS compiler, when we have static constants, in the .s file we get something like: .type $.str33, at object # @.str33 .section .rodata.str1.1,"aMS", at progbits,1 $.str33: .asciz "//" .size $.str33, 3 Currently when we create direct object code we are referencing the symbol as an offset in .rodata and not directly using
2016 Jul 05
2
Representing MIPS ABI information in the triple as ARM/X86 do for EABI/EABIHF/X32
...r the MIPS O32 ABI, I'm now trying to do the same thing for the MIPS N64 ABI. Unfortunately, it is not currently possible to enable IAS by default for the N64 ABI without also enabling it for the N32 ABI because this information is not reflected in the triple and that's the only information MipsMCAsmInfo has. This would be fine if it N32 was also in a good state but the current N32 ABI support for IAS is badly broken and will likely take considerable effort to fix (and fixing it also requires solving the same key problem as enabling IAS for just N64). I therefore want to separate the two ABI's...
2013 Mar 07
0
[LLVMdev] [RFC] TileGX, a new backend for Tilera's many core processor
Hi all, Updated the patches for TILE-Gx backend: 1. added initial regression tests for tilegx codegen. 2. added initial regression tests for MC Layer. 3. fixed those commenting style issues. please review, thanks. I have tried to understand the new backend requirement for LLVM from the mailiing list archive, it's sure TILE-Gx backend will be actively maintained & improved, it's
2013 Mar 02
3
[LLVMdev] RFC: TileGX, a new backend for Tilera's many core processor
On 03/02/2013 04:50 AM, Dmitri Gribenko wrote: > You also need tests for Clang bits, too. > > Mechanical issues: > > +/// getTileRegisterNumbering - Given the enum value for some register, > +/// return the number that it corresponds to. > > Please don't duplicate function and class name in comments. Existing > code does this, but current style guidelines advise not
2015 Sep 22
2
The Trouble with Triples
>> Here's the line of thought that I'd like people to start with: >> * Triples don't describe the target. They look like they should, but they >> don't. They're really just arbitrary strings. > >Triples are used as a starting point, but no more. I disagree with this but for now let's assume it's true. The starting point is incorrect because