search for: mipsdisassembl

Hello Daniel, At the moment we are preparing the patch for disassembling microMIPS 16 bit instructions and it will be on Phabricator tomorrow or on Wednesday. Functionality is implemented in MipsDisassembler::getInstruction where first two bytes are read and decodeInstruction is called with DecoderTableMicroMips16 and only if it fails we read 4 bytes and call decodeInstruction with DecoderTableMicroMips32. Regards, Zoran ________________________________ From: Daniel Sanders Sent: Sunday, November...

Hi, We have this line in micromips-16-bit-instructions.s # CHECK-EB: addu16 $6, $17, $4 # encoding: [0x07,0x42] However, when I check this with llvm-mc, like below, I dont get back the assembly. This is against the latest LLVM code. What is wrong here? Thanks, Jun $ echo "0x07,0x42"|./Release+Asserts/bin/llvm-mc -disassemble -triple=mips -show-encoding -mattr=micromips

...r214662 - [Mips] Add the `mips64-linux-gnu` target to the test case to check `in128` type handling. * r217147 - [mips] Zero-sized structs cannot be ignored in MipsABIInfo::classifyReturnType() for O32 Proposed llvm patches: * r216920 - Fix left shifts of negative values in MipsDisassembler. * r221408 - [mips64] Fix MIPS64 exception personality encoding * r221453 - [mips] Tolerate the use of the %z inline asm operand modifier with non-immediates. * r216262 - [mips] Don't use odd-numbered float registers for double arguments for fastcc calling conventio...

On Apr 8, 2013, at 2:55 PM, "Robinson, Paul" <Paul_Robinson at playstation.sony.com> wrote: I keep seeing "this is a layering violation" comments on the lists. > While there are a few llvm.org pages that mention layers in passing, > there is nothing (that I've found) actually specifying the layers. > Trying to infer the layering from the code is tedious and

I keep seeing "this is a layering violation" comments on the lists. While there are a few llvm.org pages that mention layers in passing, there is nothing (that I've found) actually specifying the layers. Trying to infer the layering from the code is tedious and error-prone (or we wouldn't see so many violations in code reviews, eh?). Now, I understand that Google has some sort

...ormat: utils/release/merge.sh > > Note this only works with SVN. If you use git, you may need to manually > paste > the svn commit log. Thanks. I'm happy to merge them. > > Proposed llvm patches: > > > > * r216920 - Fix left shifts of negative values in MipsDisassembler. > > > > * r221408 - [mips64] Fix MIPS64 exception personality encoding > > > > * r221453 - [mips] Tolerate the use of the %z inline asm operand > modifier with non-immediates. > > > > * r216262 - [mips] Don't use odd-numbered flo...

...get/Mips/Release+Asserts/MipsSEISelDAGToDAG.o differ: byte 83281, line 94 ./lib/Target/Mips/InstPrinter/Release+Asserts/MipsInstPrinter.o ../../recurse2be/build/./lib/Target/Mips/InstPrinter/Release+Asserts/MipsInstPrinter.o differ: byte 51888, line 73 ./lib/Target/Mips/Disassembler/Release+Asserts/MipsDisassembler.o ../../recurse2be/build/./lib/Target/Mips/Disassembler/Release+Asserts/MipsDisassembler.o differ: byte 231517, line 500 ./lib/Target/Mips/AsmParser/Release+Asserts/MipsAsmParser.o ../../recurse2be/build/./lib/Target/Mips/AsmParser/Release+Asserts/MipsAsmParser.o differ: byte 136060, line 462 ./l...