Displaying 12 results from an estimated 12 matches for "mipsasmprint".
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mipsasmprinter
2010 Jul 26
2
[LLVMdev] LLVM Dependency Graph
...0AsmPrinter -> System
MSP430AsmPrinter -> Target
MSP430CodeGen -> CodeGen
MSP430CodeGen -> Core
MSP430CodeGen -> MC
MSP430CodeGen -> MSP430Info
MSP430CodeGen -> SelectionDAG
MSP430CodeGen -> Support
MSP430CodeGen -> System
MSP430CodeGen -> Target
MipsInfo -> Support
MipsAsmPrinter -> AsmPrinter
MipsAsmPrinter -> CodeGen
MipsAsmPrinter -> Core
MipsAsmPrinter -> MC
MipsAsmPrinter -> MipsCodeGen
MipsAsmPrinter -> MipsInfo
MipsAsmPrinter -> Support
MipsAsmPrinter -> System
MipsAsmPrinter -> Target
MipsCodeGen -> CodeGen
MipsCodeGen -> Core
Mips...
2014 Jan 31
5
[LLVMdev] emitting function stub for mips16 floating point patch
...slating the actual function now.
How do you emit an .ent or .globl from asm printer?
.type ?
.end ??
.section ???
I'm studying the classes now but it should be simple to do so if you
know, you can save me some time
because this is another maze of llvm data abstraction.
Tia.
Reed
void MipsAsmPrinter::EmitFPCallStub(
const char* Symbol, const Mips16HardFloatInfo::FuncSignature*
Signature) {
OutStreamer.EmitRawText("\t.globl "+ Twine(Symbol));
.........
OutStreamer.EmitRawText("\t# Stub function to call " + Twine(RetType) +
" "...
2014 Jan 29
3
[LLVMdev] making emitInlineAsm protected
...re any objections to doing this?
>>
>> Reed
>>
>> _______________________________________________
>> LLVM Developers mailing list
>> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
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Stubs to emit in MipsAsmPrinter
I think you were one of the people that was against me emitting the
inline asm earlier as part of the IR.
Well, now I am starting to move that to the back end of code generation
due to other issues that were not apparent when I first implemented this
mips16 hard float.
Also, it was agreed a...
2015 Feb 28
2
[LLVMdev] LLVM register number for MIPS DAGToDAG
Thanks for your reply Quentin. I do understand that the registers are
allocated much later in the pipeline.
I am assuming that the physical registers are allocated before
MipsAsmPrinter class.
I am doing something like
if (MI->getOpcode() == Mips::OPCODE) {
unsigned n = MI->getNumOperands();
for(unsigned i=0 ; i < n ; i++) {
const MachineOperand &MO = MI->getOperand(i);
if (MO.isReg())
{
fprint...
2013 Apr 01
0
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working
...-28,6 +28,8 @@ private:
SDValue getMips16SPAliasReg();
+ virtual bool runOnMachineFunction(MachineFunction &MF);
+
void getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg);
virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
diff --git a/lib/Target/Mips/MipsAsmPrinter.cpp b/lib/Target/Mips/MipsAsmPrinter.cpp
index 1876cb6..e0ddade 100644
--- a/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -46,6 +46,10 @@
using namespace llvm;
bool MipsAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
+ // Initialize TargetLowerin...
2013 Apr 01
3
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working
On Thu, Mar 28, 2013 at 12:22 PM, Nadav Rotem <nrotem at apple.com> wrote:
> IMHO the right way to handle target function attributes is to
> re-initialize the target machine and TTI for every function (if the
> attributes changed). Do you have another solution in mind ?
I don't really understand this.
TargetMachine and TTI may be quite expensive to initialize. Doing so for
2013 Mar 27
1
[LLVMdev] LLVM pass question
So the switching between mips16 and mips32 on a per function basis seems
to basically be working except that asm printer has some kind of
issue here.
I'm debugging that now.
I get this:
lc: /home/rkotler/workspace/llvmpb6/include/llvm/MC/MCStreamer.h:224:
void llvm::MCStreamer::SwitchSection(const llvm::MCSection*): Assertion
`Section && "Cannot switch to a null
2015 Feb 27
0
[LLVMdev] LLVM register number for MIPS DAGToDAG
> On Feb 27, 2015, at 1:59 AM, Ambuj Agrawal <ambujbwt at gmail.com> wrote:
>
> Is it possible to get a register number to which the value is allocated to in MIPS in DAGToDAG class?
>
> More Specifically:
> SDValue Reg3 = Node->getOperand(3);
> if (RegisterSDNode *R = dyn_cast<RegisterSDNode>(Reg3))
>
2013 Apr 09
0
[LLVMdev] Please document the layers
On Apr 8, 2013, at 2:55 PM, "Robinson, Paul" <Paul_Robinson at playstation.sony.com> wrote:
I keep seeing "this is a layering violation" comments on the lists.
> While there are a few llvm.org pages that mention layers in passing,
> there is nothing (that I've found) actually specifying the layers.
> Trying to infer the layering from the code is tedious and
2015 Feb 27
2
[LLVMdev] LLVM register number for MIPS DAGToDAG
Is it possible to get a register number to which the value is allocated to
in MIPS in DAGToDAG class?
More Specifically:
SDValue Reg3 = Node->getOperand(3);
if (RegisterSDNode *R = dyn_cast<RegisterSDNode>(Reg3))
{
op3 = cast<RegisterSDNode>(Reg3)->getReg();
2013 Apr 08
2
[LLVMdev] Please document the layers
I keep seeing "this is a layering violation" comments on the lists.
While there are a few llvm.org pages that mention layers in passing,
there is nothing (that I've found) actually specifying the layers.
Trying to infer the layering from the code is tedious and error-prone
(or we wouldn't see so many violations in code reviews, eh?).
Now, I understand that Google has some sort
2014 Jan 29
6
[LLVMdev] making emitInlineAsm protected
I would like to make the following member of AsmPrinter be protected
void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0,
InlineAsm::AsmDialect AsmDialect =
InlineAsm::AD_ATT) const;
I have some stubs that I want to emit in MipsAsmParser .
Are there any objections to doing this?
Reed