Displaying 3 results from an estimated 3 matches for "mipsallegrex".
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mipsallegrexel
2008 Mar 07
0
[LLVMdev] llvm-gcc and mips
...diff -burN gcc-4.1.0/config.sub gcc-psp/config.sub
--- gcc-4.1.0/config.sub 2005-12-16 12:57:40.000000000 +0000
+++ gcc-psp/config.sub 2006-05-07 13:27:40.000000000 +0100
@@ -264,6 +264,7 @@
| mipsisa64sb1 | mipsisa64sb1el \
| mipsisa64sr71k | mipsisa64sr71kel \
| mipstx39 | mipstx39el \
+ | mipsallegrex | mipsallegrexel \
| mn10200 | mn10300 \
| mt \
| msp430 \
@@ -346,6 +347,7 @@
| mipsisa64sb1-* | mipsisa64sb1el-* \
| mipsisa64sr71k-* | mipsisa64sr71kel-* \
| mipstx39-* | mipstx39el-* \
+ | mipsallegrex-* | mipsallegrexel-* \
| mmix-* \
| mt-* \
| msp430-* \
@@ -689,6 +691,10 @...
2008 Mar 07
2
[LLVMdev] llvm-gcc and mips
Hi,
When using mips-unknown-linux-gnu as a cross-compiler, the llvm Mips
backend is called by cc1 and with that you get llvm bytecode defined
relative to the Mips ABI. This can be messing up somehow your
generated C code.
2008/3/7, HyperQuantum <hyperquantum at gmail.com>:
> On Fri, Feb 29, 2008 at 2:23 PM, HyperQuantum <hyperquantum at gmail.com> wrote:
> > At least I got
2009 Jul 17
0
[LLVMdev] Running all the backends over test/CodeGen/Generic
...t comparison operators are
unimplemented. The issue that takes the cake, though, is that
lowering for the malloc instruction and memcpy intrinsic is broken!
Thumb: 2. Both failures print "Unsupported addressing mode!"
Arm: 0.
Mipsel/mips: 20. Goes down to 8 using a triple containing
mipsallegrex, which uses soft-float expansion for doubles. The 8 are
a bunch of inline asm failures and a couple of "Return operand #2 has
unhandled type i32" failures. The other crashes are related to issues
with support for hard-float doubles.
CellSPU: 29. Suffers from misc unimplemented operati...