search for: miparser

I have made changes in 3 files: LaneBitmask.h, codegenregisters.cpp and miparser.cpp. files are attached here. Now i am getting following errors. which means registerinfo.inc file is not generated successfully. /PIM/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:733:24: error: no member named 'XMM8' in namespace 'llvm::X86' if ((RegNo >= X86::XMM8 &amp...

Thank You. I have replaced all the occurrences of unsigned with uint64_t in Lanemask.h and in all other related files like codegenregisters.cpp, codegenregisters.h, MIParser.cpp etc... Also i changed Log2_32 to Log2_64 and replaced 4 with 8 in codegenregisters.cpp, but still getting the same error: error:Ran out of lanemask bits to represent subregister sub_32768bit_hi_then_sub_16384bit_hi_then_sub_8192bit_hi_then _sub_4096bit_hi_then_sub_2048bit_hi_then_sub_32bit_h...

...ml it is stated that instruction names are case sensitive. For register names it appear that they are lower cased before printing (see printReg in TargetRegisterInfo.cpp) and to match the definitions are also lower cased before loaded into the parser (see PerTargetMIParsingState::initNames2Regs in MIParser.cpp). For sub-register index names the latter happens but they are currently printed with their original casing witch leads to our problem. What is the right solution here, should they be lower cased when printing as well (as I tried to do in https://reviews.llvm.org/D60311)? To me it seems that...

...Jul 19, 2017 at 11:38 AM, hameeza ahmed <hahmed2305 at gmail.com> > wrote: > >> Thank You. >> >> I have replaced all the occurrences of unsigned with uint64_t in >> Lanemask.h and in all other related files like codegenregisters.cpp, >> codegenregisters.h, MIParser.cpp etc... Also i changed Log2_32 to Log2_64 >> and replaced 4 with 8 in codegenregisters.cpp, but still getting the same >> error: >> >> >> error:Ran out of lanemask bits to represent subregister >> sub_32768bit_hi_then_sub_16384bit_hi_then_sub_8192bit_hi_then...

What about the static asserts protecting a Log call and another in the parser? On Wed, Jul 19, 2017 at 2:26 PM Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote: > On 7/19/2017 4:18 PM, Craig Topper wrote: > > LaneMask isn't as self contained as it should be. 64 bits is enough > > here. The problem is accidental leaking of the current size. > > > > For

...lt;mailto:hahmed2305 at gmail.com>> wrote: >> >> Thank You. >> >> I have replaced all the occurrences of unsigned with uint64_t in >> Lanemask.h and in all other related files like >> codegenregisters.cpp, codegenregisters.h, MIParser.cpp etc... >> Also i changed Log2_32 to Log2_64 and replaced 4 with 8 in >> codegenregisters.cpp, but still getting the same error: >> >> >> error:Ran out of lanemask bits to represent subregister >> sub_32768bit_hi_then_sub_1638...

...u trying to >> add something to it, or are you working on a separate target? >> >> -Krzysztof >> >> On 7/19/2017 4:47 PM, hameeza ahmed wrote: >> >> I have made changes in 3 files: >> LaneBitmask.h, codegenregisters.cpp and miparser.cpp. files are >> attached here. >> >> Now i am getting following errors. which means registerinfo.inc >> file is not generated successfully. >> >> /PIM/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:733:24: error: >>...

The simplest way to run a clang test case that I know of is to clone both llvm and clang repos, run all the tests, then run an individual test. IIRC like so: git clone llvm ...... cd llvm/tools git clone clang ..... cd ../../ mkdir build cd build cmake ../llvm ninja check-clang ./bin/llvm-lit -v ./tools/clang/test/Sema/asm.c On Sun, May 6, 2018 at 7:10 AM, Sedat Dilek via llvm-dev <

Hi, while experimenting with llvmlinux on Debian/testing AMD64 I wanted to run some x86-64 ASM tests. I fell over [1] and wanted to run it. So, I cloned clang from Git... $ git clone https://github.com/llvm-mirror/clang.git I looked through some docs where I have seen I need "llvm-lit" or "lit.py". The Debian package llvm-7-tools from <apt.llvm.org> does ship

...{int, stat*}]’ will change in C++17 because the exception specification is part of a function type [-Wnoexcept-type] inline auto RetryAfterSignal(const FailT &Fail, const Fun &F, ^~~~~~~~~~~~~~~~ [462/2954] Building CXX object lib/CodeGen/MIRParser/CMakeFiles/LLVMMIRParser.dir/MIParser.cpp.o In file included from /home/sdi/src/llvm/llvm/include/llvm/ADT/StringRef.h:13:0, from /home/sdi/src/llvm/llvm/include/llvm/ADT/StringMap.h:17, from /home/sdi/src/llvm/llvm/include/llvm/Support/Host.h:17, from /home/sdi/src/llvm/llvm/include/l...

Hello, Mr. krzysztof I have seen similar question asked by you on llvm group. Could you please help me here to address this issue. i am trying to construct a register of size 65536 bit by combining 2 registers of 32768 bits. both the 32768 bit registers are different so i have to use the following method let SubRegIndices = [sub_32768bit, sub_32768bit_hi], CoveredBySubRegs = 1 in but i am

...gt; > Thank You. > > > > I have replaced all the occurrences of unsigned with > > uint64_t in > > Lanemask.h and in all other related files like > > codegenregisters.cpp, codegenregisters.h, MIParser.cpp > > etc... > > Also i changed Log2_32 to Log2_64 and replaced 4 with 8 > in > > codegenregisters.cpp, but still getting the same > error: > > > > > > error:Ran out of lanemask bits to represen...

...9;/home/NIKHILREDDY/WORK/LLVM_OBJ/lib/CodeGen/AsmPrinter' make[3]: Entering directory '/home/NIKHILREDDY/WORK/LLVM_OBJ/lib/CodeGen/MIRParser' llvm[3]: Compiling MILexer.cpp for Release+Asserts build llvm[3]: Compiling InstructionCombining.cpp for Release+Asserts build llvm[3]: Compiling MIParser.cpp for Release+Asserts build llvm[3]: Compiling Reg2Mem.cpp for Release+Asserts build llvm[3]: Compiling RewriteStatepointsForGC.cpp for Release+Asserts build llvm[3]: Compiling MIRParser.cpp for Release+Asserts build llvm[4]: Building Release+Asserts Archive Library libLLVMX86Disassembler.a make[...