search for: min_elts

...E registers have the same number of bytes and will therefore decrease the number of elements per register as the element type increases in size. If you want to extract something other than the first part of a vector, you need to add offsets based on a calculation from vscale (e.g. adding vscale * (min_elts/2) allows you to reach the high half of a larger register). If you check the patch which introduces splatvector (https://reviews.llvm.org/D47775), you can see a line which currently produces an error if changing the size of a vector is required, and notes that VECTOR_SHUFFLE_VAR hasn't been im...

On Friday, 21 July 2017 18:11:58 CEST Richard W.M. Jones wrote: > --- > builder/sources.ml | 2 -- > common/mlstdutils/Makefile.am | 4 ++- > common/mlstdutils/stringSet.ml | 19 ++++++++++++ > common/mlstdutils/stringSet.mli | 46 ++++++++++++++++++++++++++++ > dib/elements.ml |

--- builder/sources.ml | 2 -- common/mlstdutils/Makefile.am | 4 ++- common/mlstdutils/stringSet.ml | 19 ++++++++++++ common/mlstdutils/stringSet.mli | 46 ++++++++++++++++++++++++++++ dib/elements.ml | 2 -- sysprep/sysprep_operation_ca_certificates.ml | 1 -

Hi, Now that Sander has committed enough MC support for SVE, here's an updated RFC for variable length vector support with a set of 14 patches (listed at the end) to demonstrate code generation for SVE using the extensions proposed in the RFC. I have some ideas about how to support RISC-V's upcoming extension alongside SVE; I'll send an email with some additional comments on

--- .gitignore | 6 +- .gitmodules | 3 - HACKING | 41 +++ Makefile.am | 6 +- README | 7 +- TODO | 61 +--- autobuild.sh | 65 ---- autogen.sh | 12 - configure.ac | 27