search for: mimd

...ning and the architecture file, we extract BBs into functions and move these to different LLVM modules, one for each device of the architecture. Each module is then compiled with a machine-specific backend and against a device-specific communications library. All the executables can be run in a MIMD fashion in a cluster. The inputs and outputs are handled in two ways: a) By means of the virtual registers. When these traverse device boundaries, they are turned into function parameters. The compiler inserts marshalling/unmarshalling code as well as "server" and "client&qu...

...ight make sense. One major issue with OpenCL C (and I suppose CUDA) kernels some fail to see is that the functions are "directly callable" (just by choosing a correct the calling convention) in general only for SIMT/SPMD-style machines (like NVIDIA and I suppose AMD's GPUs). For the MIMD (with possible SIMD/vector extensions) CPU-architectures you need to transform the kernel function to a "work group function" so it retains its parallel work item semantics whenever the kernel is to be called with more than 1 parallel work items. The transformation is not completely triv...

I am working on a pass to extract small regions of code to run somewhere else (different node in a cluster). Basically what I need is the ability to isolate a region of code, get its inputs and outputs, create a new function with the extracted code and code aggregating the in and out parameters as structs that can be cast for a “void*”-based interface. It looks like the CodeExtractor

...jor issue with OpenCL C (and I suppose CUDA) kernels some > fail to see is that the functions are "directly callable" > (just by choosing a correct the calling convention) in general only for > SIMT/SPMD-style machines (like NVIDIA and I suppose AMD's GPUs). > > For the MIMD (with possible SIMD/vector extensions) CPU-architectures > you need to transform the kernel function to a "work group function" > so it retains its parallel work item semantics whenever the kernel is > to be called with more than 1 parallel work items. > > The transformatio...

On Tue, Dec 13, 2011 at 3:37 PM, Villmow, Micah <Micah.Villmow at amd.com>wrote: > ** ** > > *From:* Justin Holewinski [mailto:justin.holewinski at gmail.com] > *Sent:* Tuesday, December 13, 2011 10:50 AM > > *To:* Villmow, Micah > *Cc:* LLVM Developers Mailing List > *Subject:* Re: [LLVMdev] Changes to the PTX calling conventions**** > > ** ** > > On

----- Original Message ----- > From: "Chris Lattner" <clattner at apple.com> > To: "Diego Novillo" <dnovillo at google.com> > Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Sent: Thursday, March 6, 2014 5:54:02 PM > Subject: Re: [LLVMdev] RFC - Adding an optimization report facility? > > > On Mar 6, 2014, at

...itioning and the architecture file, we extract BBs into functions and move these to different LLVM modules, one for each device of the architecture. Each module is then compiled with a machine-specific backend and against a device-specific communications library. All the executables can be run in a MIMD fashion in a cluster. > > The inputs and outputs are handled in two ways: > > a) By means of the virtual registers. When these traverse device boundaries, they are turned into function parameters. The compiler inserts marshalling/unmarshalling code as well as "server" an...

From: Justin Holewinski [mailto:justin.holewinski at gmail.com] Sent: Tuesday, December 13, 2011 10:50 AM To: Villmow, Micah Cc: LLVM Developers Mailing List Subject: Re: [LLVMdev] Changes to the PTX calling conventions On Tue, Dec 13, 2011 at 12:54 PM, Villmow, Micah <Micah.Villmow at amd.com<mailto:Micah.Villmow at amd.com>> wrote: From: Justin Holewinski [mailto:justin.holewinski