Displaying 5 results from an estimated 5 matches for "mimatch".
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2018 Aug 13
2
Assembly mimatch between windows and linux llvm.(probably caused by sort algorithm)
To whom it may concern,
I'm running some testcases(A and B) in Linux LLVM(built in Ubuntu16.04) and Windows LLVM(built by Visual Studio 2015), both of which were LLVM 4.0.0 and built with same source codes, but I got different assembly files(A_Linux != A_Windows, B_Linux = B_Windows). Privacy reasons prevent me from sharing my testcases here, sorry.
I compared debug information and found the
2013 Jun 18
3
[LLVMdev] ARM struct byval size > 64 triggers failure
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2013 Jun 19
2
[LLVMdev] ARM struct byval size > 64 triggers failure
...after considering 8 byte alignment )
>>>
>>> When the offset(#76) for the instruction, "ldr r1, [r11, #76] ; 0x4c" is calculated, 4 bytes alignment is considered.
>>> In prologue stackpointer calculation 8 byte alignment is considered.
>>> Due to this mimatch of alignment, If try to access any parameter after byval which results wrong value.
>>>
>>> Issue(or offset of 4 bytes) wont occur if even number of register used for byval spilling.
>>> ex:
>>> struct S114 check114 (int a, struct S114 arg0, struct S114* arg1)...
2013 Jun 18
0
[LLVMdev] ARM struct byval size > 64 triggers failure
...sters
> VARegSaveSize = 16 (after considering 8 byte alignment )
>
> When the offset(#76) for the instruction, "ldr r1, [r11, #76] ; 0x4c" is calculated, 4 bytes alignment is considered.
> In prologue stackpointer calculation 8 byte alignment is considered.
> Due to this mimatch of alignment, If try to access any parameter after byval which results wrong value.
>
> Issue(or offset of 4 bytes) wont occur if even number of register used for byval spilling.
> ex:
> struct S114 check114 (int a, struct S114 arg0, struct S114* arg1) { // accessing arg1 is fine in...
2013 Jun 20
1
[LLVMdev] ARM struct byval size > 64 triggers failure
...; When the offset(#76) for the instruction, "ldr r1, [r11, #76] ;
> >>>> 0x4c" is calculated, 4 bytes alignment is considered.
> >>>> In prologue stackpointer calculation 8 byte alignment is considered.
> >>>>
> >>>> Due to this mimatch of alignment, If try to access any parameter
> >>>> after byval which results wrong value.
> >>>>
> >>>> Issue(or offset of 4 bytes) wont occur if even number of register
> >>>> used for byval spilling.
> >>>> ex:
> >&...