search for: microprocessors

I purchased a Code Red RDB1768v2r3 Rev B1 board. I'm trying to use the NXP provided example for the Speex codec from App Note: NXP AN11085 http://ics.nxp.com/support/documents/microcontrollers/zip/an11085.zip Does this example application run reliably on the Code Red RDB1768v2r3? Is there a modified version of Speex available that is fully functional? When

On Sat, Sep 27, 2014 at 3:19 AM, Andy Ritger <aritger at nvidia.com> wrote: > > Hi, all. Hey Andy, > > Below is a link to a brief document describing some changes in NVIDIA > Falcon processors ("fuc", in Nouveau-speak, IIUC) We started trying to use your names where we know them a while back. I personally think of "fuc" as short-hand for "falcon

There is a strange Writable Instruction Set Computing CPU from Imsys (Sweden) based on FPGA. Is it possible to setup the IMSYS CPU for running applications based on LLVA/LLVM? Thank you. Swedish microprocessor developer Imsys Technologies has released three devices in its reconfigurable family of processors. Unveiled at the Microprocessor Forum in San Jose, each device combines the processor with

Hello, I am new to LLVM and complier development, am more comfortable with logic gates. However, I am part of a research project that intends to develop a co-designed virtual machine reconfigurable computing, the virtual machine controls a reconfigurable fabric in addition to a microprocessor. The microprocessor may be an ARM and the system should employ a JIT to generate code for the

I am looking for a micro ssh server/client implementation. This implementation would have to be small enough to run on microprocessors. e.g. systems with <512KB memory and ~20Mhz 8bit processors - like a Rabbit or a PIC. I have looked around but have not found anything suitable. Does anyone have a recommendataion? Thanks in advance. Thomas DuBuisson

Hi, Would anyone be interested in developing a LatticeMico32 backend in LLVM? LatticeMico32 [1] is an open source microprocessor core designed by Lattice Semiconductor and typically used in FPGAs. It is comparable to the Microblaze processor that you already support. It is already supported by GNU Binutils and GCC (4.5+). It is used by the Milkymist [2] and RTEMS [3] projects. The Milkymist

Hello Everyone! Been looking around the internet but have not found a solution for my problem yet, all i found was a report on opensuse forums with no replays. I have a Xen dom0 running on OpenSuse 11.4 x86_64, on this I’ve created 3 PV instances all running OpenSuse 11.4 x86_64 as well. All 3 PVs were installed the same way with the same package selection and only ONE of this 3 PVs hangs at

On Wed, Jan 14, 2015 at 4:31 PM, Karanbir Singh <mail-lists at karan.org> wrote: > On 14/01/15 23:38, PatrickD Garvey wrote: > >> Please help us (me, especially) understand what we may be doing to the >> detriment of your use of CentOS and thereby avoid that negative >> result. > > Lets flip this around - just going by your comments in the last few > days, it

Hi, all. Below is a link to a brief document describing some changes in NVIDIA Falcon processors ("fuc", in Nouveau-speak, IIUC) that happened in Maxwell: certain aspects of the chip will only be available to Falcon firmware images signed by NVIDIA. So far, the set of restricted things is pretty small, but I expect this list will slowly grow over future hardware generations.

Hi All, ?? I am a new member to the vorbis-dev mailing list. i hope that u receive the help that i've been searching for. I need to compress audio samples captured by wireless sensor node (16-bit PCM at 8Khz). can i use vorbis i such an embedded system environment that has the following HW/SW specifications: -416 MHz Microprocessor(ARM architecture, Intel Xscale family) -32 MB RAM Beside

can you give a detail description about the target architecture? ------------------ Original ------------------ From: "XU Xinfeng"<xu.xinfeng at gatech.edu>; Date: 2009年9月15日(星期二) 上午7:34 To: "llvmdev"<llvmdev at cs.uiuc.edu>; Subject: [LLVMdev] Dear LLVM, Dear LLVM, Now, I have to design special complier for my own multicore microprocessor with cusomized

Just bringing that up as I did not get any reply so far. Thanks, Sébastien On Tuesday 18 May 2010 18:38:41 Sébastien Bourdeauducq wrote: > Hi, > > Would anyone be interested in developing a LatticeMico32 backend in LLVM? > > LatticeMico32 [1] is an open source microprocessor core designed by Lattice > Semiconductor and typically used in FPGAs. It is comparable to the >

Hi, SARC Software Architecture is seeking interns for 2016 to join a world class compiler team supporting Samsung ARM microprocessor designs. Responsibilities include research, design, development, analysis and optimization of compiler software. The Compiler intern will assist in establishing Samsung’s direction and implementation of processor microarchitecture and development of compiler

I have a colleague who had an IP PBX solution put in by a reseller and they are having an issue with their ZAP channels becoming unresponsive. They are using a Digium TDM2400 Series, all inbound and outbound through the FXO ports, VOIP is internal only. Anyone aware of any known issues with Digium/Trixbox ZAP channels going awol? Thanks Cory

During booting of Centos6 I see an error message that goes something like: Starting mcelog daemon [FAILED] AMD Processor family 15: Please load edac_mce_amd module. CPU is unsupported The only helpful information I have found is in the "preview" of https://access.redhat.com/knowledge/solutions/158503. I don't have a RedHat account, so

Hi, I have Ubuntu and Asterisk 11.2.1 in a boot USB. When I put it in desktop computer, asterisk starts without problem but if I insert the same USB in a laptop computer Asterisk doesn't start. Is it possible because different microprocessors? The error is: instrucci?n ilegal ('core generado) Thanks! -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.digium.com/pipermail/asterisk-users/attachments/20130311/c669a7dc/attachment.htm>

Hi, SARC System Performance Architecture is seeking a full time compiler engineer to join a world class compiler team supporting Samsung ARM microprocessor designs. Responsibilities include research, design, development, analysis, and optimization of open-source LLVM compiler and Android open-source runtime libraries. The compiler engineer will assist in establishing Samsung’s direction and

Basically it is not possible to sanely boot a 32-bit kernel with a 64-bit EFI; the opposite is supported, however. Why would you run a 32-bit kernel these days, though? -hpa

...he llvm code generator work fine with the processor, but i am struggling to make the code generator to generate proper DAGs for the reconfigurable logic because "The LLVM target-independent code generator is designed to support efficient and quality code generation for standard register-based microprocessors.", so i want to insert my special DAG building code to the code generator. should i completely replace SelectionDAGISel, or modify SelectionDAGISel when necessary like this: LowerArguments(BasicBlock *LLVMBB) { // code for traditional target ........... for (Function::arg_iterator I = F.a...

I've checked to web for the format of the .spx file, and have not found anything complete. I've attached what I have deciphered so far. There are a few question marks in my tables that I want to understand better. I've also attached the .spx file that I used in the example values. I'm trying to take Speex-encoded data from an embedded microprocessor and put it into the .spx