search for: mfhi

...is is an illegal sequence of instructions, where instruction 3 makes $hi unpredictable: 1. mult $lo<def>, $hi<def>, $2, $3 // $lo<def>, $hi<def> = $2 * $3 2. mflo $4, $lo<use> // $4 <- $lo 3. mtlo $lo<def>, $6 // $lo <- $6. effectively clobbers $hi too. 4. mfhi $5, $hi<use> // $5 <- $hi 5. mthi $hi<def>, $7 // $hi <- $7 6. madd $lo<def>, $hi<def>, $8, $9, $lo<use>, $hi<use> // $lo<def>, $hi<def> = $2 * $3 + (lo,hi) Unlike the mtlo instruction in the example above, instruction 5 in the next example doe...

...of instructions, where instruction 3 makes $hi unpredictable: > > 1. mult $lo<def>, $hi<def>, $2, $3 // $lo<def>, $hi<def> = $2 * $3 > 2. mflo $4, $lo<use> // $4 <- $lo > 3. mtlo $lo<def>, $6 // $lo <- $6. effectively clobbers $hi too. > 4. mfhi $5, $hi<use> // $5 <- $hi > 5. mthi $hi<def>, $7 // $hi <- $7 > 6. madd $lo<def>, $hi<def>, $8, $9, $lo<use>, $hi<use> // $lo<def>, $hi<def> = $2 * $3 + (lo,hi) > > Unlike the mtlo instruction in the example above, instruction 5 in...

Currently it will always spill / restore the whole vreg but only spilling the parts that are actually live would be a nice addition in the future. Looking at r192119': if "mtlo" writes to $LO and sets $HI to an unpredictable value, then it should just have an additional (dead) def operand for $hi, shouldn't it? Greetings Matthias Am 10/8/13, 11:03 AM, schrieb Akira

I am trying to do the following pseudo-to-real instruction conversion: PseudoMFHI GPR32:$rd, ACC64:$ac -> MFHI GPR32:$rd Is there a way to tell the assembler, disassembler and instprinter to ignore the ACC64:$ac operand? I know I can use PseudoInstExpansion to accomplish this, but I just thought it would be convenient to have a flag for this, something like flag "Disabl...