search for: mf_

Displaying 20 results from an estimated 32 matches for "mf_".

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2007 Jun 22
4
[LLVMdev] df_ext_iterator in LiveIntervalAnalysis
...in doing this? In my version of LLVM, I just had to make two changes in LiveIntervalAnalysis: //===--------------------------------------- First: when numbering the instructions: // <-- new code //===--------------------------------------- unsigned miIndex = 0; MachineBasicBlock *entry = mf_->begin(); std::set<MachineBasicBlock*> visited; for (df_ext_iterator<MachineBasicBlock*> dfi = df_ext_begin(entry, visited), endi = df_ext_end(entry, visited); dfi != endi; ++dfi) { MachineBasicBlock *mbb = *dfi; for (MachineBasicBlock::it...
2007 Jun 22
0
[LLVMdev] df_ext_iterator in LiveIntervalAnalysis
...+ code = patch committed to cvs :) Thanks, nice idea btw! -Chris > //===--------------------------------------- > First: when numbering the instructions: > // <-- new code > //===--------------------------------------- > unsigned miIndex = 0; > MachineBasicBlock *entry = mf_->begin(); > std::set<MachineBasicBlock*> visited; > for (df_ext_iterator<MachineBasicBlock*> dfi = df_ext_begin(entry, > visited), > endi = df_ext_end(entry, visited); dfi != endi; > ++dfi) { > MachineBasicBlock *mbb = *dfi; >...
2007 Jun 22
0
[LLVMdev] df_ext_iterator in LiveIntervalAnalysis
...I just > had to make two changes in LiveIntervalAnalysis: > > //===--------------------------------------- > First: when numbering the instructions: > // <-- new code > //===--------------------------------------- > unsigned miIndex = 0; > MachineBasicBlock *entry = mf_->begin(); > std::set<MachineBasicBlock*> visited; > for (df_ext_iterator<MachineBasicBlock*> dfi = df_ext_begin(entry, > visited), > endi = df_ext_end(entry, visited); dfi != endi; > ++dfi) { > MachineBasicBlock *mbb = *dfi; >...
2010 Nov 13
1
[LLVMdev] problem with llvm reverse iterator
Hi, I am writing an llvm pass wherein I require to iterate MachineBasicBlocks in reverse. The ilist reverse_iterator is not functioning as expected. Nor is the ilist iterator working in reverse (although -- operator is overloaded to do so). for (MachineFunction::iterator MBBI = mf_->end(), E = mf_->begin();MBBI != E; --MBBI) { MachineBasicBlock *MBB = MBBI; DEBUG(dbgs()<<*MBB<<"\n"); } Any suggestion would be helpful. Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.l...
2008 Apr 16
3
[LLVMdev] Possible bug in LiveIntervalAnalysis?
Hi, In the LiveIntervalAnalysis::runOnMachineFunction, there is a code to compute the MBB2IdxMap, by remembering for each MBB its start and end instruction numbers: unsigned MIIndex = 0; for (MachineFunction::iterator MBB = mf_->begin(), E = mf_->end(); MBB != E; ++MBB) { unsigned StartIdx = MIIndex; for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); I != E; ++I) { bool inserted = mi2iMap_.insert(std::make_pair(I, MIIndex)).second; assert(inserted &&...
2007 Jun 22
2
[LLVMdev] df_ext_iterator in LiveIntervalAnalysis
...nks, nice idea btw! > > -Chris > >> //===--------------------------------------- >> First: when numbering the instructions: >> // <-- new code >> //===--------------------------------------- >> unsigned miIndex = 0; >> MachineBasicBlock *entry = mf_->begin(); >> std::set<MachineBasicBlock*> visited; >> for (df_ext_iterator<MachineBasicBlock*> dfi = df_ext_begin(entry, >> visited), >> endi = df_ext_end(entry, visited); dfi != endi; >> ++dfi) { >> MachineBasicBloc...
2008 Apr 16
0
[LLVMdev] Possible bug in LiveIntervalAnalysis?
...xlev at yahoo.com> wrote: > Hi, > > In the LiveIntervalAnalysis::runOnMachineFunction, there is a code to > compute the MBB2IdxMap, by remembering for each MBB its start and end > instruction numbers: > > unsigned MIIndex = 0; > for (MachineFunction::iterator MBB = mf_->begin(), E = mf_->end(); > MBB != E; ++MBB) { > unsigned StartIdx = MIIndex; > > for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); > I != E; ++I) { > bool inserted = mi2iMap_.insert(std::make_pair(I, > MIIndex)).secon...
2008 Apr 18
1
[LLVMdev] Possible bug in LiveIntervalAnalysis?
...: >> Hi, >> >> In the LiveIntervalAnalysis::runOnMachineFunction, there is a code to >> compute the MBB2IdxMap, by remembering for each MBB its start and end >> instruction numbers: >> >> unsigned MIIndex = 0; >> for (MachineFunction::iterator MBB = mf_->begin(), E = mf_->end(); >> MBB != E; ++MBB) { >> unsigned StartIdx = MIIndex; >> >> for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end(); >> I != E; ++I) { >> bool inserted = mi2iMap_.insert(std::make_pair(I, &g...
2007 Apr 12
8
[LLVMdev] Regalloc Refactoring
...s::runOnMachineFunction do this rewrite? Specifically: // perform a final pass over the instructions and compute spill // weights, coalesce virtual registers and remove identity moves. const LoopInfo &loopInfo = getAnalysis<LoopInfo>(); for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end(); mbbi != mbbe; ++mbbi) { [...] for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) { const MachineOperand &mop = mii->getOperand(i); if (mop.isRegister() && mop.getReg() && MRegi...
2007 Apr 14
0
[LLVMdev] Regalloc Refactoring
...did, but... > Specifically: > > // perform a final pass over the instructions and compute spill > // weights, coalesce virtual registers and remove identity moves. > const LoopInfo &loopInfo = getAnalysis<LoopInfo>(); > > for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end(); > mbbi != mbbe; ++mbbi) { > [...] > > for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) { > const MachineOperand &mop = mii->getOperand(i); > if (mop.isRegister() && mop.getReg() &...
2007 Apr 16
0
[LLVMdev] Regalloc Refactoring
...his rewrite? Specifically: > > // perform a final pass over the instructions and compute spill > // weights, coalesce virtual registers and remove identity moves. > const LoopInfo &loopInfo = getAnalysis<LoopInfo>(); > > for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_- > >end(); > mbbi != mbbe; ++mbbi) { > [...] > > for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) { > const MachineOperand &mop = mii->getOperand(i); > if (mop.isRegister() && mop.ge...
2009 Jan 13
2
[LLVMdev] Possible bug in the ARM backend?
...VRM to rewrite the function, it should explicitly add lives-ins for each MBB, just like LinearScan does it at the end of the RALinScan::linearScan() function??? E.g. like this: // Add live-ins to every BB except for entry. Also perform trivial coalescing. MachineFunction::iterator EntryMBB = mf_->begin(); SmallVector<MachineBasicBlock*, 8> LiveInMBBs; for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) { LiveInterval &cur = *i->second; unsigned Reg = 0; bool isPhys = TargetRegisterInfo::isPhysicalRegister(cur.reg); if (isPhy...
2007 Apr 12
0
[LLVMdev] Regalloc Refactoring
On Thu, 12 Apr 2007, David Greene wrote: > As I work toward improving LLVM register allocation, I've > come across the need to do some refactoring. cool. :) One request: Evan is currently out on vacation until Monday. This is an area that he is very interested in and will want to chime in on. Please don't start anything drastic until he gets back :). > Specifically, I would
2008 Feb 11
0
[LLVMdev] Some questions about live intervals
...; + } > + > + struct Idx2MBBCompare { > + bool operator()(const IdxMBBPair &LHS, const IdxMBBPair &RHS) > const { > + return LHS.first < RHS.first; > + } > + }; > + > class LiveIntervals : public MachineFunctionPass { > MachineFunction* mf_; > const TargetMachine* tm_; > @@ -153,6 +167,23 @@ > return MBB2IdxMap[MBBNo].second; > } > > + /// getMBBFromIndex - given an index in any instruction of an > + /// MBB return a pointer the MBB > + MachineBasicBlock* getMBBFromIndex(unsigned index) c...
2008 Feb 08
2
[LLVMdev] Some questions about live intervals
Hi Evan, Here is a patch for the LiveIntervalAnalysis that we discussed. --- Evan Cheng <evan.cheng at apple.com> schrieb: > > 1) What is the easiest way to understand which MBB a given > instruction index belongs to? All the required information is > available in the > > MBB2IdxMap of the LiveIntervalAnalysis class. Would it be useful > to add a small function
2008 Feb 11
2
[LLVMdev] Some questions about live intervals
...> > + bool operator()(const IdxMBBPair &LHS, const IdxMBBPair &RHS) > > > const { > > + return LHS.first < RHS.first; > > + } > > + }; > > + > > class LiveIntervals : public MachineFunctionPass { > > MachineFunction* mf_; > > const TargetMachine* tm_; > > @@ -153,6 +167,23 @@ > > return MBB2IdxMap[MBBNo].second; > > } > > > > + /// getMBBFromIndex - given an index in any instruction of an > > + /// MBB return a pointer the MBB > > + MachineBasic...
2007 Apr 12
3
[LLVMdev] Regalloc Refactoring
Hi all, As I work toward improving LLVM register allocation, I've come across the need to do some refactoring. Specifically, I would like to separate register coalescing from live interval analysis. Right now LiveIntervals handles both. The reason I want to separate them is that other types of register allocators might like to do coalescing differently (e.g. graph coloring does it by
2008 Oct 08
1
[LLVMdev] Getting target machine specific information at run-time
...e-per-module solution to this exact problem. Here's what it > looks like: > > class RA { > const TargetMachine* tm_; > const TargetRegisterInfo* tri_; > const TargetInstrInfo * tii_; > [...] > bool RA::runOnMachineFunction(MachineFunction &fn) { > mf_ = &fn; > tm_ = &fn.getTarget(); > tri_ = tm_->getRegisterInfo(); > tii_ = tm_->getInstrInfo(); > > if (!initialized) { > build_class_tree(); > initialized = true; > > The "initialized" flag is there to make sure it only happens on...
2011 May 26
0
[LLVMdev] Need advice on writing scheduling pass
...e slot indexes. There is a function renumberIndexes, // but it doesn't respect our new ordering of instructions, so do this by // completely clearing the results of the slot index analysis and simply // calling it again. indexes_->releaseMemory(); indexes_->runOnMachineFunction(*mf_); // Now compute live intervals again. That's it! computeIntervals(); The fixKillInformation() function is also mine; it updates the isKill flags of MachineOperands and the lists of killing instructions maintained by LiveVariables. This setup isn't quite in line with LLVM's pass...
2010 Sep 13
2
[LLVMdev] Multi-class register allocatable only in one class
...gs_[Reg] && RC->contains(Reg)) mri_->setRegAllocationHint(cur->reg, 0, Reg); where "allocatableRegs_" is calculated during pass init, and ignores register class. I think this should be changed to: if (Reg && (tri_->getAllocatableSet(*mf_, RC))[Reg] && RC- >contains(Reg)) mri_->setRegAllocationHint(cur->reg, 0, Reg); or, if compilation speed discourages calling "getAllocatableSet" so often, create "allocatableRegs_" array per register-class, instead of just one. If it is ok I...