Displaying 7 results from an estimated 7 matches for "mergevalues".
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merge_values
2008 Sep 01
2
[LLVMdev] Type Legalizer - Load handling problem
...de is used
for example to replace
i32 = truncate 0x2374b48
with the first result of
i32,ch = load 0x2356390, 0x2357188, 0x2356b88 <0x236ee80:0> alignment=4
This works fine right now. It fails with ReplaceNodeWith because the
number of results differs. It could be made to work by using a MergeValues
node to produce a node with one result out of the load, and similarly for
the other examples of this kind of thing.
Ciao,
Duncan.
2007 Sep 28
0
[LLVMdev] Lowering operations to 8-bit!
...xpandOp
should have been called to split the register up. I'd suggest going
up the stack to figure out who called LegalizeOp instead of ExpandOp.
> Here is my code in the formalizing arguments (copied ISD::MERGE_VALUES
> from PowerPC implementation, not sure if it is really needed)
MergeValues is required because the FORMAL_ARGUMENTs node returns one
value for each argument input to the function, and also a chain
value. These have to match up correctly.
-Chris
2007 Sep 28
2
[LLVMdev] Lowering operations to 8-bit!
Attached please find the gdb backtrace dump and the postscript file of
the DAG right before assertion.
The red Node is the current Node in LegalizeOp()
The only thing that I am customizing before we get here is the
FORMAL_ARGUMENTS. At this time I don't really care about the arguments,
just want to get some global values working. When I trace the program,
it is well passed the legalizing of
2008 Aug 29
2
[LLVMdev] Type Legalizer - Load handling problem
> > LOAD node has two values but the assertion checks N->getNumValues() == 1
> > which is not letting us change load operation.
>
> Yup, in this case you need to return an SDValue with null Val field,
> and take care of replacing values yourself.
That said, it looks like it is done this way because no-one needed
anything more. It could easily be changed to handle the
2008 Aug 29
0
[LLVMdev] Type Legalizer - Load handling problem
On Fri, 2008-08-29 at 17:28 +0200, Duncan Sands wrote:
> > > LOAD node has two values but the assertion checks N->getNumValues() == 1
> > > which is not letting us change load operation.
> >
> > Yup, in this case you need to return an SDValue with null Val field,
> > and take care of replacing values yourself.
>
> That said, it looks like it is done
2008 Sep 01
0
[LLVMdev] Type Legalizer - Load handling problem
...replace
> i32 = truncate 0x2374b48
> with the first result of
> i32,ch = load 0x2356390, 0x2357188, 0x2356b88 <0x236ee80:0> alignment=4
> This works fine right now. It fails with ReplaceNodeWith because the
> number of results differs. It could be made to work by using a MergeValues
> node to produce a node with one result out of the load, and similarly for
> the other examples of this kind of thing.
>
I think we will have to go that way since I may want to replace a "store" node also
(A store node does not produce any results). In this case ReplaceNodeWith...
2007 Sep 28
2
[LLVMdev] Lowering operations to 8-bit!
...xpandOp
should have been called to split the register up. I'd suggest going
up the stack to figure out who called LegalizeOp instead of ExpandOp.
> Here is my code in the formalizing arguments (copied ISD::MERGE_VALUES
> from PowerPC implementation, not sure if it is really needed)
MergeValues is required because the FORMAL_ARGUMENTs node returns one
value for each argument input to the function, and also a chain
value. These have to match up correctly.
-Chris
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