search for: memx

Signed-off-by: Roy Spliet <nouveau at spliet.org> --- drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h | 2 + drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramfuc.h | 8 +++ drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c | 66 +++++++++++++++++++++++ 3 files changed, 76 insertions(+) diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h index f37538eb..b9c46ef 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h +++ b/drivers/gpu/drm/nouve...

...register writes, just split out fb_disable and fb_enable. Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- drivers/gpu/drm/nouveau/core/include/subdev/pwr.h | 2 ++ drivers/gpu/drm/nouveau/core/subdev/fb/ramfuc.h | 14 ++++++++++++++ drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/memx.fuc | 4 ++-- drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/os.h | 4 ++-- drivers/gpu/drm/nouveau/core/subdev/pwr/memx.c | 20 ++++++++++++++++++-- 5 files changed, 38 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/pwr.h b/drivers/gpu/drm/nouveau/...

Patch 1 and 2 implement wait-for-vblank, required to remove flicker when reclocking memory Patch 3 and 4 allow me to do things between waiting for VBLANK and disabling FB, like pause PFIFO and wait for the engines to idle. This minimises the time PFIFO is paused, thus maximises performance. The rest of the patches speak for themselves. As the actual memory reclocking script is still somewhat prone

...actually updated. Detected by CoverityScan, CID#1271291 ("Uninitialized scaler variable") Fixes: ebb58dc2ef8c ("drm/nouveau/pmu: rename from pwr (no binary change)") Signed-off-by: Colin Ian King <colin.king at canonical.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c index 11b28b086a06..7b052879af72 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c +++ b/drivers/gpu/drm/nouveau/nvkm/s...

...gned-off-by: Roy Spliet <rspliet at eclipso.eu> --- drivers/gpu/drm/nouveau/core/include/subdev/pwr.h | 2 + drivers/gpu/drm/nouveau/core/subdev/fb/ramfuc.h | 16 ++ drivers/gpu/drm/nouveau/core/subdev/fb/ramnva3.c | 318 +++++++++++++++++++-- .../gpu/drm/nouveau/core/subdev/pwr/fuc/memx.fuc | 111 +++++++ drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/os.h | 5 + drivers/gpu/drm/nouveau/core/subdev/pwr/memx.c | 35 ++- 6 files changed, 458 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/pwr.h b/drivers/gpu/drm/nouveau/core/include/s...

...58dc2ef8c ("drm/nouveau/pmu: rename from pwr (no binary change)") Signed-off-by: Colin Ian King <colin.king at canonical.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> Signed-off-by: Sasha Levin <sashal at kernel.org> --- drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c index 11b28b086a06..7b052879af72 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c +++ b/drivers/gpu/drm/nouveau/nvkm/s...

...58dc2ef8c ("drm/nouveau/pmu: rename from pwr (no binary change)") Signed-off-by: Colin Ian King <colin.king at canonical.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> Signed-off-by: Sasha Levin <sashal at kernel.org> --- drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c index 11b28b086a06..7b052879af72 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c +++ b/drivers/gpu/drm/nouveau/nvkm/s...

...58dc2ef8c ("drm/nouveau/pmu: rename from pwr (no binary change)") Signed-off-by: Colin Ian King <colin.king at canonical.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> Signed-off-by: Sasha Levin <sashal at kernel.org> --- drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c index e6f74168238c..2ef9e942f43a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c +++ b/drivers/gpu/drm/nouveau/nvkm/s...

...58dc2ef8c ("drm/nouveau/pmu: rename from pwr (no binary change)") Signed-off-by: Colin Ian King <colin.king at canonical.com> Signed-off-by: Ben Skeggs <bskeggs at redhat.com> Signed-off-by: Sasha Levin <sashal at kernel.org> --- drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c index e6f74168238c..2ef9e942f43a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.c +++ b/drivers/gpu/drm/nouveau/nvkm/s...

Following a series of patches that implement memory reclocking for NVA3/5/8 with DDR2, DDR3 and GDDR3 on board. I tested these patches on 6 different graphics cards, but I expect reclocking now to work on many more. Testers can pick up these patches and test it by enabling pstate (nouveau.pstate=1). They should then be able to change clocks by writing to /sys/class/drm/card0/device/pstate. Correct

...at.com> > --- > drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h | 746 +++++++++---------- > drm/nouveau/nvkm/subdev/pmu/fuc/gk208.fuc5.h | 802 ++++++++++---------- > drm/nouveau/nvkm/subdev/pmu/fuc/gt215.fuc3.h | 1006 +++++++++++++------------- > drm/nouveau/nvkm/subdev/pmu/fuc/memx.fuc | 30 +- > 4 files changed, 1292 insertions(+), 1292 deletions(-) > [...] > diff --git a/drm/nouveau/nvkm/subdev/pmu/fuc/memx.fuc b/drm/nouveau/nvkm/subdev/pmu/fuc/memx.fuc > index ec03f9a4..1663bf94 100644 > --- a/drm/nouveau/nvkm/subdev/pmu/fuc/memx.fuc > +++ b/drm/n...

...erbst <kherbst at redhat.com> --- drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h | 746 +++++++++---------- drm/nouveau/nvkm/subdev/pmu/fuc/gk208.fuc5.h | 802 ++++++++++---------- drm/nouveau/nvkm/subdev/pmu/fuc/gt215.fuc3.h | 1006 +++++++++++++------------- drm/nouveau/nvkm/subdev/pmu/fuc/memx.fuc | 30 +- 4 files changed, 1292 insertions(+), 1292 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h b/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h index 0bcf0b30..0ce37dd4 100644 --- a/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h +++ b/drm/nouveau/nvkm/subdev/pmu/fu...

...eem stable enough to move upstream. Notable changes - Training pattern upload routines from GK104+ now shared with GT215+ - Timing calculation for Fermi - GDDR5 MR calculation from VBIOS timing table v1.0. Also useful for that pesky GT 240. - A routine to translate a VBIOS init script to a set of memx writes. Used by both "that GT 240" and Fermi. - Misc clean-up Testers should expect no changes in behaviour before/after. Keen eyes can double-check on their Tesla and Fermi GDDR5 graphics cards that training patterns are uploaded on boot.

...eem stable enough to move upstream. Notable changes - Training pattern upload routines from GK104+ now shared with GT215+ - Timing calculation for Fermi - GDDR5 MR calculation from VBIOS timing table v1.0. Also useful for that pesky GT 240. - A routine to translate a VBIOS init script to a set of memx writes. Used by both "that GT 240" and Fermi. - Misc clean-up Testers should expect no changes in behaviour before/after. Keen eyes can double-check on their Tesla and Fermi GDDR5 graphics cards that training patterns are uploaded on boot.

...m/subdev/pmu/fuc/gf100.fuc3.h | 750 +++++++++---------- drm/nouveau/nvkm/subdev/pmu/fuc/gf119.fuc4.h | 4 +- drm/nouveau/nvkm/subdev/pmu/fuc/gk208.fuc5.h | 806 ++++++++++---------- drm/nouveau/nvkm/subdev/pmu/fuc/gt215.fuc3.h | 1010 +++++++++++++------------- drm/nouveau/nvkm/subdev/pmu/fuc/memx.fuc | 30 +- 5 files changed, 1300 insertions(+), 1300 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h b/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h index 0bcf0b30..d66e0e76 100644 --- a/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h +++ b/drm/nouveau/nvkm/subdev/pmu/fu...

...<kherbst at redhat.com> --- drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h | 1072 +++++++++++------------ drm/nouveau/nvkm/subdev/pmu/fuc/gk208.fuc5.h | 978 ++++++++++----------- drm/nouveau/nvkm/subdev/pmu/fuc/gt215.fuc3.h | 1194 +++++++++++++------------- drm/nouveau/nvkm/subdev/pmu/fuc/memx.fuc | 30 +- 4 files changed, 1637 insertions(+), 1637 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h b/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h index 0838d503..9da36e86 100644 --- a/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h +++ b/drm/nouveau/nvkm/subdev/pmu/fu...

...C24 +#define NVKM_FALCON_UNSHIFTED_IO +//#define NVKM_FALCON_MMIO_UAS +//#define NVKM_FALCON_MMIO_TRAP + +#include "macros.fuc" + +.section #gk104_pmu_data +#define INCLUDE_PROC +#include "kernel.fuc" +#include "arith.fuc" +#include "host.fuc" +#include "memx.fuc" +#include "perf.fuc" +#include "i2c_.fuc" +#include "test.fuc" +#include "idle.fuc" +#undef INCLUDE_PROC + +#define INCLUDE_DATA +#include "kernel.fuc" +#include "arith.fuc" +#include "host.fuc" +#include "memx.fuc...

Patch 1 fixes nva3 bailing due to not finding the right ramcfg Patch 2 is a resend rebased on 3.17.0-rc4 for setting the vblank period Patch 3-5 handle writes to per-partition registers, for which NVA3 does not have special broadcast regs available. Patch 6 removes local structs from NVA3 reclocking in favour of the already existing "ram->base." variables, like in NVE0 As always,

Re-use the therm-exported fan structure with only two minor modifications: - pwm_freq: u16 -> u32; - add fan_type (toggle or PWM) v2: - Do not memset the table to 0 as it erases the pre-set default values Signed-off-by: Martin Peres <martin.peres at free.fr> --- drm/Kbuild | 1 + drm/core/include/subdev/bios/fan.h | 1 + drm/core/subdev/bios/fan.c | 1

...d be valid for some load/store instructions, but not for ADD. Can I run some legalization function for the illegal instruction? Version 2: The situation worsens (or improves, depending on the point of view) when I replace explicit address-register usage by common complex patterns, like ADDRx and MEMx: for the instruction where the first version generates illegal code, LLVM gives the error message: LLVM ERROR: Cannot select: 0x7fc7a9034f10: ch = store 0x7fc7a9034d10:1, 0x7fc7a9034d10, 0x7fc7a9034b10, 0x7fc7a9034810<ST1[%arrayidx](align=4)> [ORD=18] [ID=7] 0x7fc7a9034d10: i32,ch = load 0...