Displaying 3 results from an estimated 3 matches for "memsyssiga".
2008 Dec 04
2
[LLVMdev] optimization whith call of Intrinsics
...that
the call of intrinsics is not well supported by existing optimization
passes.
Does anybody have an idea about this problem ? ( just below, the IR
generated by LLVM after optimization)
Thanks.
Julien
; ModuleID = 'TheModule'
@MemSys = global i16 0 ; <i16*> [#uses=2]
@MemSysSigA = global i16 3 addrspace(2) ; <i16 addrspace(2)*>
[#uses=2]
@reg_ai_beg = global i16 405 addrspace(1) ; <i16 addrspace(1)*>
[#uses=2]
define void @OFUNC(i16* %N0, i16* %N1) nounwind {
entry:
store i16 1, i16 addrspace(1)* @reg_ai_beg
%outLLVMInt = tail call i1...
2008 Dec 04
0
[LLVMdev] optimization whith call of Intrinsics
...existing optimization
> passes.
> Does anybody have an idea about this problem ? ( just below, the IR
> generated by LLVM after optimization)
> Thanks.
>
> Julien
>
>
>
> ; ModuleID = 'TheModule'
> @MemSys = global i16 0 ; <i16*> [#uses=2]
> @MemSysSigA = global i16 3 addrspace(2) ; <i16 addrspace(2)*>
> [#uses=2]
> @reg_ai_beg = global i16 405 addrspace(1) ; <i16 addrspace(1)*>
> [#uses=2]
>
> define void @OFUNC(i16* %N0, i16* %N1) nounwind {
> entry:
> store i16 1, i16 addrspace(1)* @reg_ai_beg...
2008 Dec 04
1
[LLVMdev] optimization whith call of Intrinsics
...orted for then moment ?)
Julien
> Dead store elimination is that pass that could do the optimizations in
> question. The second store to @reg_ai_beg should be eliminated; I'm
> not really surprised that it doesn't implement this particular case,
> though. For the stores to @MemSysSigA, LLVM doesn't know that
> llvm.octo.su.opa.rd doesn't read @MemSysSigA, so neither store can be
> eliminated.
>
> You should be able to solve both these problems by writing a special
> alias analysis pass that knows about the behavior of
> llvm.octo.su.opa.rd. See http://...