search for: memoryregionops

...tch (size) { + case 1: + virtio_config_writeb(proxy->vdev, addr, val); + break; + case 2: + virtio_config_writew(proxy->vdev, addr, val); + break; + case 4: + virtio_config_writel(proxy->vdev, addr, val); + break; + } +} + static const MemoryRegionOps virtio_pci_config_ops = { .read = virtio_pci_config_read, .write = virtio_pci_config_write, @@ -465,6 +692,46 @@ static const MemoryRegionOps virtio_pci_config_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; +static const MemoryRegionOps virtio_pci_config_common_ops = { + .read...

...tch (size) { + case 1: + virtio_config_writeb(proxy->vdev, addr, val); + break; + case 2: + virtio_config_writew(proxy->vdev, addr, val); + break; + case 4: + virtio_config_writel(proxy->vdev, addr, val); + break; + } +} + static const MemoryRegionOps virtio_pci_config_ops = { .read = virtio_pci_config_read, .write = virtio_pci_config_write, @@ -465,6 +692,46 @@ static const MemoryRegionOps virtio_pci_config_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; +static const MemoryRegionOps virtio_pci_config_common_ops = { + .read...

When running on PowerPC, we don''t have native PIO support. There are a few hacks around to enable PIO access on PowerPC nevertheless. The most typical one is the isa-mmio device. It takes MMIO requests and converts them to PIO requests on the (QEMU internal) PIO bus. This however is not how real hardware works and it limits us in the ability to spawn eventfd''s on PIO ports

...(proxy->vdev, addr, val); > + break; > + case 2: > + virtio_config_writew(proxy->vdev, addr, val); > + break; > + case 4: > + virtio_config_writel(proxy->vdev, addr, val); > + break; > + } > +} > + > static const MemoryRegionOps virtio_pci_config_ops = { > .read = virtio_pci_config_read, > .write = virtio_pci_config_write, > @@ -465,6 +692,46 @@ static const MemoryRegionOps virtio_pci_config_ops = { > .endianness = DEVICE_LITTLE_ENDIAN, > }; > > +static const MemoryRegionOps virtio_pc...

...log_writeb(s, (uint32_t)val); break; default: break; } } -static MemoryRegionPortio xen_pci_portio[] = { - { 0, 0x100, 1, .read = xen_platform_ioport_readb, }, - { 0, 0x100, 1, .write = xen_platform_ioport_writeb, }, - PORTIO_END_OF_LIST() -}; - static const MemoryRegionOps xen_pci_io_ops = { - .old_portio = xen_pci_portio, + .read = xen_platform_ioport_readb, + .write = xen_platform_ioport_writeb, + .impl.min_access_size = 1, + .impl.max_access_size = 1, }; static void platform_ioport_bar_setup(PCIXenPlatformState *d) -- 1.7.10.4

...e VGA write if x86? Alistair > > cheers, > Gerd > > diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c > index 62085f9fc063..e93e838243b8 100644 > --- a/hw/display/bochs-display.c > +++ b/hw/display/bochs-display.c > @@ -151,6 +151,26 @@ static const MemoryRegionOps bochs_display_qext_ops = { > .endianness = DEVICE_LITTLE_ENDIAN, > }; > > +static uint64_t dummy_read(void *ptr, hwaddr addr, unsigned size) > +{ > + return -1; > +} > + > +static void dummy_write(void *ptr, hwaddr addr, > + uint64_t val...

...e VGA write if x86? Alistair > > cheers, > Gerd > > diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c > index 62085f9fc063..e93e838243b8 100644 > --- a/hw/display/bochs-display.c > +++ b/hw/display/bochs-display.c > @@ -151,6 +151,26 @@ static const MemoryRegionOps bochs_display_qext_ops = { > .endianness = DEVICE_LITTLE_ENDIAN, > }; > > +static uint64_t dummy_read(void *ptr, hwaddr addr, unsigned size) > +{ > + return -1; > +} > + > +static void dummy_write(void *ptr, hwaddr addr, > + uint64_t val...

Implement a simple Xen APIC module and use it to deliver MSI/MSIX for Xen HVM guests.

...ddr & proxy->bar0_mask); + return val; +} + +static uint32_t virtio_pci_config_mmio_readl(void *opaque, target_phys_addr_t addr) +{ + VirtIOPCIProxy *proxy = opaque; + uint32_t val = virtio_pci_config_readl(opaque, addr & proxy->bar0_mask); + return val; +} + static const MemoryRegionOps virtio_pci_config_ops = { .old_portio = virtio_portio, + .old_mmio = { + .read = { + virtio_pci_config_mmio_readb, + virtio_pci_config_mmio_readw, + virtio_pci_config_mmio_readl, + }, + .write = { + virtio_pci_config_mmio_writ...

...ddr & proxy->bar0_mask); + return val; +} + +static uint32_t virtio_pci_config_mmio_readl(void *opaque, target_phys_addr_t addr) +{ + VirtIOPCIProxy *proxy = opaque; + uint32_t val = virtio_pci_config_readl(opaque, addr & proxy->bar0_mask); + return val; +} + static const MemoryRegionOps virtio_pci_config_ops = { .old_portio = virtio_portio, + .old_mmio = { + .read = { + virtio_pci_config_mmio_readb, + virtio_pci_config_mmio_readw, + virtio_pci_config_mmio_readl, + }, + .write = { + virtio_pci_config_mmio_writ...

Hi all, this patch series by Wei Liu implements a simple Xen APIC module and use it to deliver MSI/MSIX for Xen HVM guests. The second version of this series includes the "or later" copyright clause for xen_apic.c and a fix to the return value of xen_apic_mem_read (thanks Peter for finding it out). Stefano Stabellini (2): Xen: basic HVM MSI injection support. Xen: Add

virtio 1.0 defines config space as LE, as opposed to pre-1.0 which was native endian. Add API for transports to execute word/dword accesses in little endian format - will be useful for mmio and pci (byte access is also wrapped, for completeness). For simplicity, we still keep config in host native endian format, byteswap to LE on guest access. Signed-off-by: Michael S. Tsirkin <mst at

virtio 1.0 defines config space as LE, as opposed to pre-1.0 which was native endian. Add API for transports to execute word/dword accesses in little endian format - will be useful for mmio and pci (byte access is also wrapped, for completeness). For simplicity, we still keep config in host native endian format, byteswap to LE on guest access. Signed-off-by: Michael S. Tsirkin <mst at

...> + > +static uint64_t vfio_vmd_quirk_read(void *opaque, hwaddr addr, unsigned size) > +{ > + VFIOVMDQuirk *data = opaque; > + uint64_t val = 0; > + > + memcpy(&val, (void *)data->membar_phys + addr, size); > + return val; > +} > + > +static const MemoryRegionOps vfio_vmd_quirk = { > + .read = vfio_vmd_quirk_read, > + .endianness = DEVICE_LITTLE_ENDIAN, > +}; > + > +#define VMD_VMLOCK 0x70 > +#define VMD_SHADOW 0x2000 > +#define VMD_MEMBAR2 4 > + > +static int vfio_vmd_emulate_shadow_registers(VFIOPCIDevice *vdev) > +{...

...> > > +{ > > > + VFIOVMDQuirk *data = opaque; > > > + uint64_t val = 0; > > > + > > > + memcpy(&val, (void *)data->membar_phys + addr, size); > > > + return val; > > > +} > > > + > > > +static const MemoryRegionOps vfio_vmd_quirk = { > > > + .read = vfio_vmd_quirk_read, > > > + .endianness = DEVICE_LITTLE_ENDIAN, > > > +}; > > > + > > > +#define VMD_VMLOCK 0x70 > > > +#define VMD_SHADOW 0x2000 > > > +#define VMD_MEMBAR2 4 > > > +...

Hyper-V SynIC (synthetic interrupt controller) device implementation. The implementation contains: * msr's support * irq routing setup * irq injection * irq ack callback registration * event/message pages changes tracking at Hyper-V exit * Hyper-V test device to test SynIC by kvm-unit-tests Andrey Smetanin (7): standard-headers/x86: add Hyper-V SynIC constants target-i386/kvm: Hyper-V

Hyper-V SynIC (synthetic interrupt controller) device implementation. The implementation contains: * msr's support * irq routing setup * irq injection * irq ack callback registration * event/message pages changes tracking at Hyper-V exit * Hyper-V test device to test SynIC by kvm-unit-tests Andrey Smetanin (7): standard-headers/x86: add Hyper-V SynIC constants target-i386/kvm: Hyper-V

...;cpu_model; + const char *kernel_filename = args->kernel_filename; CPUM68KState *env; int kernel_size; uint64_t elf_entry; diff --git a/hw/axis_dev88.c b/hw/axis_dev88.c index eab6327..2fd7356 100644 --- a/hw/axis_dev88.c +++ b/hw/axis_dev88.c @@ -242,11 +242,12 @@ static const MemoryRegionOps gpio_ops = { static struct cris_load_info li; static -void axisdev88_init (ram_addr_t ram_size, - const char *boot_device, - const char *kernel_filename, const char *kernel_cmdline, - const char *initrd_filename, const char *cpu_model)...