Displaying 3 results from an estimated 3 matches for "memopv4i32".
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memopv4f32
2009 Jun 05
1
[LLVMdev] TableGen Type Inference
On Friday 05 June 2009 17:41, Dan Gohman wrote:
> How is bc_memopv4i32 defined? The bitconvert in the tablegen
> output is marked isInt, which means it's the node that didn't get
> inferred.
def bc_memopv4i32 : PatFrag<(ops node:$ptr), (bitconvert
(memopv4i32 node:$ptr))>;...
2009 Jun 04
2
[LLVMdev] TableGen Type Inference
...VCVTDQ2PS128rm: (set:isVoid VR128:v4f32:$dst, (sint_to_fp:v4f32
(bitconvert:isInt (ld:v4i32 addr:iPTR:$src)<<P:Predicate_memop>>)))
llvm/tblgen: In VCVTDQ2PS128rm: Could not infer all types in pattern!
The pattern as written looks like this:
[(set VR128:$dst, (v4f32 (sint_to_fp (bc_memopv4i32 addr:$src))))]
I'm trying to unify AVX/SSE converts in a reasonable way. Right now,
X86InstrSSE.td doesn't have patterns for sint_to_fp and fp_to_sint
with memory operands. I guess this is why, but I don't understand
why it's illegal.
-Dave
2009 Jun 05
0
[LLVMdev] TableGen Type Inference
How is bc_memopv4i32 defined? The bitconvert in the tablegen
output is marked isInt, which means it's the node that didn't get
inferred.
Dan
On Jun 4, 2009, at 1:06 PM, David Greene wrote:
> Can someone explain why TableGen can't figure this out?
>
> VCVTDQ2PS128rm: (set:isVoid VR128:v4f32:$ds...