Displaying 6 results from an estimated 6 matches for "memopchain".
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memopchains
2008 Apr 21
0
[LLVMdev] RFC: PowerPC tail call optimization patch
...// FIXME: Should this use ANY_EXTEND if neither sext nor zext?
@@ -1946,7 +2285,13 @@ SDOperand
PPCTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG,
if (GPR_idx != NumGPRs) {
RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg));
} else {
- MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL,
0));
+ if (!isTailCall)
+ MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
NULL, 0));
+ // Calculate and remember argument location.
+ else
+ CalculateTailCallArgDest(DAG, MF, isPPC64, Arg, SPDiff,...
2008 Apr 22
2
[LLVMdev] RFC: PowerPC tail call optimization patch
...e ANY_EXTEND if neither sext nor zext?
> @@ -1946,7 +2285,13 @@ SDOperand
> PPCTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG,
> if (GPR_idx != NumGPRs) {
> RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg));
> } else {
> - MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL,
> 0));
> + if (!isTailCall)
> + MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
> NULL, 0));
> + // Calculate and remember argument location.
> + else
> + CalculateTailCallArg...
2008 Apr 16
2
[LLVMdev] RFC: PowerPC tail call optimization patch
Hello Dale,
this is an updated version of the tail call optimization patch for
powerpc. could you have a look at it?
i added code to support ppc64 (untested, will try to get access to
ppc64 on a friend's machine).
incorporated evan's formatting suggestions. ;)
will run another round of testing (llvm-test) on my powerpc g4/800
when i get the okay to commit. testing on this machine takes
2008 Apr 22
0
[LLVMdev] RFC: PowerPC tail call optimization patch
...ither sext nor zext?
>> @@ -1946,7 +2285,13 @@ SDOperand
>> PPCTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG,
>> if (GPR_idx != NumGPRs) {
>> RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg));
>> } else {
>> - MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL,
>> 0));
>> + if (!isTailCall)
>> + MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
>> NULL, 0));
>> + // Calculate and remember argument location.
>> + else
>> +...
2012 Oct 26
1
[LLVMdev] Properly handling mem-loc arguments when prologue adjusts FP.
...// Get the stack pointer if needed.
if (StackPtr.getNode() == 0) {
StackPtr = DAG.getCopyFromReg(Chain, dl, ARC::SP, getPointerTy());
}
SDValue PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr,
DAG.getIntPtrConstant(VA.getLocMemOffset()));
MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff,
MachinePointerInfo(),false, false, 0));
}
...
[2]: LowerFormalArguments
...
if (VA.isRegLoc()) {
// Arguments passed in registers.
const TargetRegisterClass *RC = ARC::CPURegsRegisterClass;
unsigned int Register =...
2008 Jan 08
1
[LLVMdev] RFC: Tailcall Improvement
Here is a patch to improve argument lowering for tail calls. Before
this patch all outgoing arguments were move to the stack slot where
they would go on a normal function call and from there moved back to
the tail call stack slot to prevent overwriting of values.
After this patch only arguments that source from callers arguments
(formal_arguments) are lowered this way.
I moved some code