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...CrossThread = 1 + CrossThread = 0, + SingleThread = ~0U }; The change passes almost all lit tests including one new test (see patch 0005). The failing tests are specifically checking for forward compatibility: Failing Tests (3): LLVM :: Bitcode/cmpxchg-upgrade.ll LLVM :: Bitcode/memInstructions.3.2.ll LLVM :: Bitcode/weak-cmpxchg-upgrade.ll This breakage remains even if we reverse the order of synchronization scopes. One simple way to preserve compatibility is to retain 0 and 1 with their current meanings, and specify that intermediate scopes are represented in an ordered way...

> On Nov 18, 2014, at 2:35 PM, Chandler Carruth <chandlerc at google.com> wrote: > > > On Fri, Nov 14, 2014 at 1:09 PM, Sahasrabuddhe, Sameer <sameer.sahasrabuddhe at amd.com <mailto:sameer.sahasrabuddhe at amd.com>> wrote: > 1. Update the synchronization scope field in atomic instructions from a > single bit to a wider field, say 32-bit unsigned integer.

...+ SingleThread = ~0U > }; > > The change passes almost all lit tests including one new test (see patch > 0005). The failing tests are specifically checking for forward > compatibility: > > Failing Tests (3): > LLVM :: Bitcode/cmpxchg-upgrade.ll > LLVM :: Bitcode/memInstructions.3.2.ll > LLVM :: Bitcode/weak-cmpxchg-upgrade.ll > > This breakage remains even if we reverse the order of synchronization > scopes. One simple way to preserve compatibility is to retain 0 and 1 with > their current meanings, and specify that intermediate scopes are > repr...

...CHECK: cmpxchg volatile i32* %x, i32 0, i32 1 acq_rel acquire + cmpxchg volatile i32* %x, i32 0, i32 1 acq_rel acquire ; CHECK: atomicrmw add i32* %x, i32 10 seq_cst atomicrmw add i32* %x, i32 10 seq_cst ; CHECK: atomicrmw volatile xchg i32* %x, i32 10 monotonic diff --git a/test/Bitcode/memInstructions.3.2.ll b/test/Bitcode/memInstructions.3.2.ll index 868e4b5..21c3deb 100644 --- a/test/Bitcode/memInstructions.3.2.ll +++ b/test/Bitcode/memInstructions.3.2.ll @@ -223,69 +223,69 @@ define void @cmpxchg(i32* %ptr,i32 %cmp,i32 %new){ entry: ;cmpxchg [volatile] <ty>* <pointer>, &lt...