Displaying 6 results from an estimated 6 matches for "memdef".
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memdep
2007 Aug 10
1
[LLVMdev] inline assembly
...?
i could not find documentation on these flags, following the
AddInlineAsmOperands it seems to be something like: 'Code | (Size << 3)'
with Code on of these values:
1 REGUSE
2 REGDEF
3 IMM
4 MEM/ADDR
are there any other values? and would it be safe to change 4 to MEMUSE
and add 5 (MEMDEF)? i do not know where these values are used (except
for the ISelDAG and the AsmPrinter).
florian
2014 Dec 19
2
[LLVMdev] ScheduleDAGInstrs.cpp
...e() returns false between SU(2) and SU(1)? The dependency against SU(0) will not be checked, because it is not in RejectMemNodes, nor in the MemUses SU list.
2)
SU(2) Load "Value A"
SU(1) Store "Value A"
SU(0) Store "Value A"
If not using alias analysis, then the MemDefs list is cleared after *maybe* having inserted an edge from SU(0) to SU(1) with addChainDependency(). If there was not an edge inserted, then SU(2) must get a chance to check its deps against SU(0) by use of adjustChainDeps(). Again, this is only done if MayAlias is true.
I suspect therefore that...
2015 Jan 30
2
[LLVMdev] [PATCH] Bugfix for missed dependency from store to load in buildSchedGraph().
...y against SU(0) will not be checked, because it is not in
> RejectMemNodes, nor in the MemUses SU list.
>
> 2)
>
> SU(2) Load "Value A"
>
> SU(1) Store "Value A"
>
> SU(0) Store "Value A"
>
> If not using alias analysis, then the MemDefs list is cleared after
> *maybe* having inserted an edge from SU(0) to SU(1) with
> addChainDependency(). If there was not an edge inserted, then SU(2)
> must get a chance to check its deps against SU(0) by use of
> adjustChainDeps(). Again, this is only done if MayAlias is true.
>...
2015 Feb 10
2
[LLVMdev] [PATCH] Bugfix for missed dependency from store to load in buildSchedGraph().
...in
> > RejectMemNodes, nor in the MemUses SU list.
> >
> > 2)
> >
> > SU(2) Load "Value A"
> >
> > SU(1) Store "Value A"
> >
> > SU(0) Store "Value A"
> >
> > If not using alias analysis, then the MemDefs list is cleared after
> > *maybe* having inserted an edge from SU(0) to SU(1) with
> > addChainDependency(). If there was not an edge inserted, then SU(2)
> > must get a chance to check its deps against SU(0) by use of
> > adjustChainDeps(). Again, this is only done if M...
2014 Dec 16
3
[LLVMdev] ScheduleDAGInstrs.cpp
Hi,
Thank you for the reply.
>It looks to me like we can choose any subset of edges here and be correct. We're basically trying to prune/pinch the DAG edges here. They can easily blow up with AA sched. I would guess that isCtrl() edges are good ones to bypass because they could be a low-latecy edges, whereas true data dependencies from a load are expected to be >higher latency, so they
2019 Apr 30
6
Disk space and RAM requirements in docs
...lang/test/CXX/dcl.dcl/dcl.attr/dcl.attr.depend/Output
12K build/tools/clang/test/CXX/dcl.dcl/basic.namespace/namespace.udir/Output
12K build/tools/clang/test/CXX/dcl.dcl/basic.namespace/namespace.def/namespace.unnamed
12K build/tools/clang/test/CXX/dcl.dcl/basic.namespace/namespace.def/namespace.memdef
12K build/tools/clang/test/CXX/cpp/cpp.predefined
12K build/tools/clang/test/CXX/conv/conv.qual
12K build/tools/clang/test/CXX/conv/conv.ptr
12K build/tools/clang/test/CXX/conv/conv.mem
12K build/tools/clang/test/CXX/conv/conv.fctptr
12K build/tools/clang/test/CXX/concepts-ts/temp/temp.constr...