Displaying 2 results from an estimated 2 matches for "membar2".
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2020 May 13
0
[PATCH for QEMU v2] hw/vfio: Add VMD Passthrough Quirk
...> values from the device before anyone has written to them and the BAR
> > emulation in the kernel kicks in (not a problem, just an observation).
> It's not expected that there will be anything writing that resource and
> those registers are read-only.
> The first 0x2000 of MEMBAR2 (BAR4) contain msix tables, and mappings to
> subordinate buses are on 1MB aligned.
>
>
> > Does the VMD controller code then use these bases addresses to program
> > the bridges/endpoint within the domain? What does the same /proc/iomem
> > or lspci look like inside t...
2020 May 11
0
[PATCH for QEMU v2] hw/vfio: Add VMD Passthrough Quirk
...s the transaction because the window
> + * has been programmed with guest addresses.
> + *
> + * VMD can use the Host Physical Address in order to correctly program the
> + * bridge windows in its PCIe domain. VMD device 28C0 has HPA shadow registers
> + * located at offset 0x2000 in MEMBAR2 (BAR 4). The shadow registers are valid
> + * if bit 1 is set in the VMD VMLOCK config register 0x70. VMD devices without
> + * this native assistance can have these registers safely emulated as these
> + * registers are reserved.
> + */
> +typedef struct VFIOVMDQuirk {
> + VFI...