Displaying 8 results from an estimated 8 matches for "mem_barrier".
2007 May 24
0
[PATCH] add comments to nv_local.h
.../
-#define VGA_WR08(p,i,d) NV_WR08(p,i,d)
-#define VGA_RD08(p,i) NV_RD08(p,i)
+#define VGA_WR08(base,offset,value) NV_WR08(base,offset,value)
+#define VGA_RD08(base,offset) NV_RD08(base,offset)
#if defined(__i386__)
#define _NV_FENCE() outb(0x3D0, 0);
@@ -69,15 +69,21 @@
#define _NV_FENCE() mem_barrier();
#endif
+/* READ_GET returns the location in the push buffer (FIFO) the gpu is
+ * currently reading from
+ */
+#define READ_GET(pNv) (((pNv)->FIFO[0x0011] - (pNv)->fifo.put_base) >> 2)
-#define READ_GET(pNv) (((pNv)->FIFO[0x0011] - pNv->fifo.put_base) >> 2)
+/* WRITE...
2014 Nov 19
5
[PATCH v2 0/3] nouveau: support for custom VRAM domains
This series is to allow NVIDIA chips with shared memory to operate more
efficiently (and to operate at all once we disable VRAM from the kernel
driver) by allowing nouveau_screen to specify a domain to use for objects
originally allocated into VRAM. If the domain is not overridden, the default
NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be
used in place of
2014 Jul 01
1
[PATCH 1/2] nv50: do an explicit flush on draw when there are persistent buffers
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/gallium/drivers/nouveau/nv50/nv50_context.c | 22 ++++++++++++++++++-
src/gallium/drivers/nouveau/nv50/nv50_context.h | 1 +
src/gallium/drivers/nouveau/nv50/nv50_vbo.c | 29 ++++++++++++++++++++++++-
3 files changed, 50 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.c
2014 Nov 19
0
[PATCH v2 2/3] nvc0: use NV_VRAM_DOMAIN() macro
...screen->text, prog->immd_base, NOUVEAU_BO_VRAM,
+ screen->text, prog->immd_base, NV_VRAM_DOMAIN(&screen->base),
prog->immd_size, prog->immd_data);
BEGIN_NVC0(nvc0->base.pushbuf, NVC0_3D(MEM_BARRIER), 1);
@@ -770,7 +770,7 @@ nvc0_program_library_upload(struct nvc0_context *nvc0)
return;
nvc0->base.push_data(&nvc0->base,
- screen->text, screen->lib_code->start, NOUVEAU_BO_VRAM,
+ screen->text, screen->lib_code-&...
2014 Nov 19
1
[PATCH v2 2/3] nvc0: use NV_VRAM_DOMAIN() macro
...screen->text, prog->immd_base, NOUVEAU_BO_VRAM,
> + screen->text, prog->immd_base, NV_VRAM_DOMAIN(&screen->base),
> prog->immd_size, prog->immd_data);
>
> BEGIN_NVC0(nvc0->base.pushbuf, NVC0_3D(MEM_BARRIER), 1);
> @@ -770,7 +770,7 @@ nvc0_program_library_upload(struct nvc0_context *nvc0)
> return;
>
> nvc0->base.push_data(&nvc0->base,
> - screen->text, screen->lib_code->start, NOUVEAU_BO_VRAM,
> + scree...
2014 Nov 19
1
[PATCH v2 2/3] nvc0: use NV_VRAM_DOMAIN() macro
...screen->text, prog->immd_base, NOUVEAU_BO_VRAM,
> + screen->text, prog->immd_base, NV_VRAM_DOMAIN(&screen->base),
> prog->immd_size, prog->immd_data);
>
> BEGIN_NVC0(nvc0->base.pushbuf, NVC0_3D(MEM_BARRIER), 1);
> @@ -770,7 +770,7 @@ nvc0_program_library_upload(struct nvc0_context *nvc0)
> return;
>
> nvc0->base.push_data(&nvc0->base,
> - screen->text, screen->lib_code->start, NOUVEAU_BO_VRAM,
> + screen->...
2014 Oct 27
4
[PATCH 0/3] nouveau: support for custom VRAM domains
This series is to allow NVIDIA chips with shared memory to operate more
efficiently (and to operate at all once we disable VRAM from the kernel
driver) by allowing nouveau_screen to specify a domain to use for objects
originally allocated into VRAM. If the domain is not overridden, the default
NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be
used in place of
2015 Jun 19
5
[PATCH v3 0/2] nouveau: support for custom VRAM domains
New revision of this patchset that prevents VRAM objects from being
allocated on VRAM-less systems like Tegra. This is required for Mesa
to work on such systems.
Changes since v2:
- Use vram_size to detect systems without VRAM and set the correct
domain instead of expecting each chip to set its domain explicitly.
Alexandre Courbot (2):
nouveau: support for custom VRAM domains
nvc0: use