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On Wed, Apr 22, 2020 at 10:34 PM David Blaikie <dblaikie at gmail.com> wrote: > > > > On Wed, Apr 22, 2020 at 9:28 AM Nagaraju Mekala via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> On Tue, Apr 21, 2020 at 6:16 PM Robinson, Paul <paul.robinson at sony.com> wrote: >> > >> > >> > >> > > -----Original Message----- >> > > From: llvm-dev <llvm-dev-bou...

Hi Florian, Thanks for the reply. On Fri, Dec 8, 2017 at 6:48 PM, Florian Hahn <florian.hahn at arm.com> wrote: > Hi, > > On 08/12/2017 06:24, Nagaraju Mekala via llvm-dev wrote: >> >> Hi all, >> >> I am new to LLVM. Currently working on adding an embedded target to >> LLVM backend. >> I was able to generate the object file for our target using LLVM and >> Clang framework. >> The generated object f...

...those warning messages and continued to generate disassembly without .debug sections init. > But yeah, don't really know what's happening there. Might be you need to debug the linker & see what it's reading/being confused by. > > On Sat, Apr 18, 2020 at 10:05 AM Nagaraju Mekala <nagaraju.mekala87 at gmail.com> wrote: >> >> >> >> On Saturday, April 18, 2020, David Blaikie <dblaikie at gmail.com> wrote: >>> >>> >>> >>> On Sat, Apr 18, 2020 at 3:02 AM Nagaraju Mekala via llvm-dev <llvm-dev at lists.ll...

On Tue, Apr 21, 2020 at 6:16 PM Robinson, Paul <paul.robinson at sony.com> wrote: > > > > > -----Original Message----- > > From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Nagaraju > > Mekala via llvm-dev > > Sent: Tuesday, April 21, 2020 6:04 AM > > To: jh7370.2008 at my.bristol.ac.uk > > Cc: LLVM Developers Mailing List <llvm-dev at lists.llvm.org> > > Subject: Re: [llvm-dev] Debug symbols are missing in elf > > > > Hi James, > > > &g...

Hi All, I am working on a target which requires to generated two instructions for a single branch instruction. ex: imm 1 br r4,0xabcd branch address is 0x1abcd, imm has the upper 16 bits and br has lower 16 bits. Can anyone let me know how to write these kind of patterns in the InstrInfo.td file. Thanks in Advance, Nagaraju

...s to me like the DWARF is corrupt somehow. What happens if you try using llvm-objdump (as opposed to a GNU-based objdump) to dump the information? What warning(s) do you see? That'll hopefully give a little more context as to what is going wrong. > > On Mon, 20 Apr 2020 at 05:26, Nagaraju Mekala via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> On Sat, Apr 18, 2020 at 11:11 PM David Blaikie <dblaikie at gmail.com> wrote: >> > >> > Yeah, not sure - you mention the linker produces errors, but the errors you showed looked like objdump errors? Wer...

On Fri, Mar 2, 2018 at 4:59 PM, David Chisnall <David.Chisnall at cl.cam.ac.uk> wrote: > On 2 Mar 2018, at 11:09, Nagaraju Mekala via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> I am working on a target which requires to generated two >> instructions for a single branch instruction. >> ex: >> imm 1 >> br r4,0xabcd >> branch address is 0x1abcd, imm has the upper 16...

On Saturday, April 18, 2020, David Blaikie <dblaikie at gmail.com> wrote: > > > On Sat, Apr 18, 2020 at 3:02 AM Nagaraju Mekala via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> Hello All, >> >> I was trying to add Microblaze target to LLVM backend. I was able to >> generate object file with relocations. and debug symbols. >> >> When I try to link this object file with...

Hi all, I am new to LLVM. Currently working on adding an embedded target to LLVM backend. I was able to generate the object file for our target using LLVM and Clang framework. The generated object file doesn't contain any debug symbols in it. I tried searching documents related to this on web but couldn't find any. Can anyone please point some links/documents on generation of

On 2 Mar 2018, at 11:09, Nagaraju Mekala via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > I am working on a target which requires to generated two > instructions for a single branch instruction. > ex: > imm 1 > br r4,0xabcd > branch address is 0x1abcd, imm has the upper 16 bits and br has > lower...

On 2 Mar 2018, at 11:45, Nagaraju Mekala <nagaraju.mekala87 at gmail.com> wrote: > > yes they are dependent if the branch immediate value is > 0xffff then > the imm instruction should generate other wise only "br" instruction > is enough. This sounds as if you have two br instructions, one that takes an im...

...nstruction Selection : Define patterns to match the custom DAG nodes. Thus actual decision of creating multiple instruction is taken care by legalizer and selection phase is dump which does pattern matching over whatever DAG is feeded to it. Thanks, Jatin On Fri, Mar 2, 2018 at 4:39 PM, Nagaraju Mekala via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi All, > > I am working on a target which requires to generated two > instructions for a single branch instruction. > ex: > imm 1 > br r4,0xabcd > branch address is 0x1abcd, imm has the upper 16 bits and...

...the custom DAG nodes. > > Thus actual decision of creating multiple instruction is taken care by > legalizer and selection phase is dump which does pattern matching over > whatever DAG is > feeded to it. > > Thanks, > Jatin > > On Fri, Mar 2, 2018 at 4:39 PM, Nagaraju Mekala via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> Hi All, >> >> I am working on a target which requires to generated two >> instructions for a single branch instruction. >> ex: >> imm 1 >> br r4,0xabcd >> branch address...

Hello All, I was trying to add Microblaze target to LLVM backend. I was able to generate object file with relocations. and debug symbols. When I try to link this object file with microblaze GCC linker I am getting below errors and debug symbols are missing in it. mb-objdump: DWARF error: found dwarf version '15877', this reader only handles version 2, 3, 4 and 5 information