search for: mdelay

nv40_sensor_setup() is never called in atomic context. It calls mdelay() to busily wait, which is not necessary. mdelay() can be replaced with msleep(). This is found by a static analysis tool named DCNS written by myself Signed-off-by: Jia-Ju Bai <baijiaju1990 at gmail.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv40.c | 4 ++-- 1 file changed, 2 inse...

nv50_sensor_setup() is never called in atomic context. It calls mdelay() to busily wait, which is not necessary. mdelay() can be replaced with msleep(). This is found by a static analysis tool named DCNS written by myself. Signed-off-by: Jia-Ju Bai <baijiaju1990 at gmail.com> --- drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv50.c | 2 +- 1 file changed, 1 inser...

...p2m_unlock(d->arch.p2m); /* Put the page back so it gets freed */ put_page(page); + + ret = 0; +out: + p2m_unlock(d->arch.p2m); return 0; } 3) fix the vmx_load_pdptrs() function in vmx.c in this situation the page directory table is paged out. Although using mdelay() is a bad idea, it''s better than making the xen crash void vmx_load_pdptrs(struct vcpu *v) { unsigned long cr3 = v->arch.hvm_vcpu.guest_cr[3], mfn; uint64_t *guest_pdptrs; p2m_type_t p2mt; char *p; unsigned int try_count = 0; /* EPT needs to load PDPTRS into...

...ivers/gpu/drm/nouveau/nouveau_bios.c index 99f7bd4..13b3fb1 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.c +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c @@ -40,8 +40,6 @@ #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg) #define LOG_OLD_VALUE(x) //x -#define BIOS_USLEEP(n) mdelay((n)/1000) - #define ROM16(x) le16_to_cpu(*(uint16_t *)&(x)) #define ROM32(x) le32_to_cpu(*(uint32_t *)&(x)) @@ -50,6 +48,15 @@ struct init_exec { bool repeat; }; +static inline void bios_usleep(unsigned usecs) +{ + might_sleep(); + if (usecs < 1000 * MAX_UDELAY_MS) + udelay(use...

...isp/dacnv50.c index f02fd9f..15df527 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c @@ -55,7 +55,14 @@ nv50_dac_sense(struct nv50_disp_priv *priv, int or, u32 loadval) nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval); mdelay(9); udelay(500); - nv_wr32(priv, 0x61a00c + doff, 0x80000000); + + /* + * The original nv50 detects a ghost monitor if we do the following + * write. See fdo#67382 for more information + */ + if (nv_device(priv)->chipset != 0x50) + nv_wr32(priv, 0x61a00c + doff, 0x80000000); + load = (nv...

The patches contain some tidy-up work, and refactoring that has arisen as a by-product of my initial work on adding TV support to nv50. Joel Holdsworth (4): drm/nouveau: Removed unneeded include in nvc0_fence.c drm/nouveau: Replaced magic numbers with defines from nouveau_reg drm/nouveau: Replaced copy-pasted nv_wait with nv50_wait_dpms_ctrl helper drm/nouveau: Refactored encoder

...au/nouveau_bios.c +++ > >> > b/drivers/gpu/drm/nouveau/nouveau_bios.c @@ -40,8 +40,6 @@ > >> > #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, > >> > ##arg) #define LOG_OLD_VALUE(x) //x > >> > > >> > -#define BIOS_USLEEP(n) mdelay((n)/1000) > >> > - > >> > #define ROM16(x) le16_to_cpu(*(uint16_t *)&(x)) > >> > #define ROM32(x) le32_to_cpu(*(uint32_t *)&(x)) > >> > > >> > @@ -50,6 +48,15 @@ struct init_exec { > >> > bool repeat; > >&gt...

...4081738a xen/common/shutdown.c --- a/xen/common/shutdown.c Fri Sep 07 19:54:29 2007 +0100 +++ b/xen/common/shutdown.c Fri Sep 07 17:37:01 2007 -0700 @@ -24,7 +24,7 @@ static void maybe_reboot(void) printk("rebooting machine in 5 seconds.\n"); watchdog_disable(); mdelay(5000); - machine_restart(NULL); + machine_restart(0); } } @@ -50,7 +50,7 @@ void dom0_shutdown(u8 reason) case SHUTDOWN_reboot: { printk("Domain 0 shutdown: rebooting machine.\n"); - machine_restart(NULL); + machine_restart(0);...

Patches that were posted last week - with review comments addressed.

I want to add a sleep() to a module. It tells me it can't find <time.h>; if I tell it "/usr/include/time.h", it gives me a ton of errors (I *have* put the #include just above where I call sleep, not up at the top). Any clues as to what I'm doing wrong? With kernel /vmlinuz-2.6.18-194.3.1.el5, I just added the line extern unsigned int sleep( unsigned int seconds ); and

...(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | 0x007f0000, + NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | 0x00150000); + nv_wait(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING, 0); - nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval); + nv_wr32(priv, load_ctrl, 0x00100000 | loadval); mdelay(9); udelay(500); - loadval = nv_mask(priv, 0x61a00c + doff, 0xffffffff, 0x00000000); + loadval = nv_mask(priv, load_ctrl, 0xffffffff, 0x00000000); - nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80550000); - nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000); + nv_mask(priv, dpms_ctrl, NV50_...

..._V1) nv_mask(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | 0x007f0000, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | 0x00150000); - nv_wait(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING, 0); + nv50_wait_dpms_ctrl(priv, dpms_ctrl); nv_wr32(priv, load_ctrl, 0x00100000 | loadval); mdelay(9); @@ -95,7 +101,7 @@ nv50_dac_sense(NV50_DISP_MTHD_V1) nv_mask(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | 0x007f0000, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING | 0x00550000); - nv_wait(priv, dpms_ctrl, NV50_PDISPLAY_DAC_DPMS_CTRL_PENDING, 0); + nv50_wait_dpms_ctrl(priv, dpms_ctrl);...

This patch series implements SMP boot for arch/arm, as far as getting all CPUs up and running the idle loop. Changes from v1: - moved barriers out of loop in udelay() - dropped broken GIC change in favour of explanatory comment - made the increment of ready_cpus atomic (I couldn''t move the increment to before signalling the next CPU because the PT switch has to happen between

...uct nvbios_init *init) } } -/** +/* * INIT_CONDITION_TIME - opcode 0x56 * */ @@ -1256,7 +1256,7 @@ init_condition_time(struct nvbios_init *init) init_exec_set(init, false); } -/** +/* * INIT_LTIME - opcode 0x57 * */ @@ -1273,7 +1273,7 @@ init_ltime(struct nvbios_init *init) mdelay(msec); } -/** +/* * INIT_ZM_REG_SEQUENCE - opcode 0x58 * */ @@ -1298,7 +1298,7 @@ init_zm_reg_sequence(struct nvbios_init *init) } } -/** +/* * INIT_PLL_INDIRECT - opcode 0x59 * */ @@ -1317,7 +1317,7 @@ init_pll_indirect(struct nvbios_init *init) init_prog_pll(init, reg, freq)...

...uct nvbios_init *init) } } -/** +/* * INIT_CONDITION_TIME - opcode 0x56 * */ @@ -1256,7 +1256,7 @@ init_condition_time(struct nvbios_init *init) init_exec_set(init, false); } -/** +/* * INIT_LTIME - opcode 0x57 * */ @@ -1273,7 +1273,7 @@ init_ltime(struct nvbios_init *init) mdelay(msec); } -/** +/* * INIT_ZM_REG_SEQUENCE - opcode 0x58 * */ @@ -1298,7 +1298,7 @@ init_zm_reg_sequence(struct nvbios_init *init) } } -/** +/* * INIT_PLL_INDIRECT - opcode 0x59 * */ @@ -1317,7 +1317,7 @@ init_pll_indirect(struct nvbios_init *init) init_prog_pll(init, reg, freq)...

Hi all, I've frustrated myself the last few days yelling at our link training code. Comparing the i915 code to radeon and nouveau I've noticed the lack of a nice set of dp helper functions. So I've started to extract a few. There's lots more that we can do I think (link configuration selection, the i2c over aux retry stuff which diverges already between i915 and radeon, maybe

Hi Ingo, This series of patches implements a number of improvements to the softlockup watchdog and its users. They are: 1. Make the watchdog ignore stolen time When running under a hypervisor, the kernel may lose an arbitrary amount of time as "stolen time". This may cause the softlockup watchdog to trigger spruiously. Xen and VMI implement sched_clock() as measuring unstolen time,

Hi Ingo, This series of patches implements a number of improvements to the softlockup watchdog and its users. They are: 1. Make the watchdog ignore stolen time When running under a hypervisor, the kernel may lose an arbitrary amount of time as "stolen time". This may cause the softlockup watchdog to trigger spruiously. Xen and VMI implement sched_clock() as measuring unstolen time,

Add a way to disable the timer IRQ routing check via a boot option. The VMI timer code uses this to avoid triggering the pester Mingo code, which probes for some very unusual and broken motherboard routings. It fires 100% of the time when using a paravirtual delay mechanism instead of using a realtime delay, since there is no elapsed real time, and the 4 timer IRQs have not yet been delivered.

Add a way to disable the timer IRQ routing check via a boot option. The VMI timer code uses this to avoid triggering the pester Mingo code, which probes for some very unusual and broken motherboard routings. It fires 100% of the time when using a paravirtual delay mechanism instead of using a realtime delay, since there is no elapsed real time, and the 4 timer IRQs have not yet been delivered.