search for: mdebug

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2018 Sep 06
3
How to add Loongson ISA for Mips target?
...LLVM developers, GCC[1] is able to use Loongson ISA[2] for instruction selection: $ cat hello.c #include <stdio.h> int main(int argc, char *argv[]) { printf("Hello World\n"); return 0; } $ gcc -O0 -S hello.c $ cat hello.s .file 1 "hello.c" .section .mdebug.abi64 .previous .nan legacy .gnu_attribute 4, 1 .abicalls .rdata .align 3 .LC0: .ascii "Hello World\000" .text .align 2 .globl main .set nomips16 .set nomicromips .ent main .type main, @functi...
2013 Feb 04
2
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
...onstant [13 x i8] c"Hello World!\00" define i32 @main() nounwind { %puts = tail call i32 @puts(i8* getelementptr inbounds ([13 x i8]* @str, i32 0, i32 0)) ret i32 0 } declare i32 @puts(i8* nocapture) nounwind For instance, the "mips" target produces this: .section .mdebug.abi32 .previous .file "helloworld.ll" .text .globl main .align 2 .type main, at function .set nomips16 # @main .ent main main: .frame $sp,24,$ra .mask 0x80000000,-4 .fmask 0x00000000,0 .set noreorder .set nomacro .set noat # BB#0: lui $2, %hi(_gp_disp) addi...
2012 Nov 11
2
[LLVMdev] Tracing nodes in selectionDAG to final code...
Hello everyone. I use this command clang -emit-llvm hello.c -c -o hello.bc llc hello.bc -march=mipsel -relocation-model=static -o hello.s to produce this MIPS code: .section .mdebug.abi32 .previous .file "hello.bc" .text .globl main .align 2 .type main, at function .set nomips16 # @main .ent main main: .cfi_startproc .frame $sp,32,$ra .mask 0x80000000,-4 .fmask 0x00000000,0 .set noreorder .set nomacro # BB#0: # %entry ad...
2013 Feb 20
3
[LLVMdev] Is va_arg correct on Mips backend?
...ts. 2. Question: Stack memory 28($sp) has no initial value. If this memory address is a relocation record which set value by linker/loader, then it maybe is correct. clang -c ch8_3.cpp -emit-llvm -o ch8_3.bc llc -march=mips -relocation-model=pic -filetype=asm ch8_3.bc -o ch8_3.mips.s .section .mdebug.abi32 .previous .file "ch8_3.bc" .text .globl _Z5sum_iiz .align 2 .type _Z5sum_iiz, at function .set nomips16 # @_Z5sum_iiz .ent _Z5sum_iiz _Z5sum_iiz: .cfi_startproc .frame $sp,64,$ra .mask 0x80000000,-4 .fmask 0x00000000,0 .set noreorder .set nomacro .set...
2018 Sep 06
2
How to add Loongson ISA for Mips target?
...t; #include <stdio.h> >> >> int main(int argc, char *argv[]) { >> printf("Hello World\n"); >> return 0; >> } >> >> $ gcc -O0 -S hello.c >> >> $ cat hello.s >> .file 1 "hello.c" >> .section .mdebug.abi64 >> .previous >> .nan legacy >> .gnu_attribute 4, 1 >> .abicalls >> .rdata >> .align 3 >> .LC0: >> .ascii "Hello World\000" >> .text >> .align 2 >> .globl main &gt...
2013 Feb 20
0
[LLVMdev] Is va_arg correct on Mips backend?
...s no initial value. If this memory address is a > relocation record which set value by linker/loader, then it maybe is > correct. > > > clang -c ch8_3.cpp -emit-llvm -o ch8_3.bc > llc -march=mips -relocation-model=pic -filetype=asm ch8_3.bc -o > ch8_3.mips.s > > .section .mdebug.abi32 > .previous > .file "ch8_3.bc" > .text > .globl _Z5sum_iiz > .align 2 > .type _Z5sum_iiz, at function > .set nomips16 # @_Z5sum_iiz > .ent _Z5sum_iiz > _Z5sum_iiz: > .cfi_startproc > .frame $sp,64,$ra > .mask 0x80000000,-4 > .fma...
2013 Feb 04
0
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
...i32 @main() nounwind { > %puts = tail call i32 @puts(i8* getelementptr inbounds ([13 x i8]* @str, > i32 0, i32 0)) > ret i32 0 > } > > declare i32 @puts(i8* nocapture) nounwind > > > For instance, the "mips" target produces this: > > .section .mdebug.abi32 > .previous > .file "helloworld.ll" > .text > .globl main > .align 2 > .type main, at function > .set nomips16 # @main > .ent main > main: > .frame $sp,2...
2012 Aug 16
3
[LLVMdev] MIPS & GP register
...-fasynchronous-unwind-tables -c -o Coach12p/RfiUiAssetsCompiled1.o -G 0 -x assembler /var/folders/mk/0mblc5810cjgs0nylrkjxqbm0000gq/T/RfiUiAssetsCompiled1-BmjBFI.s /usr/local/lytro/lib/gcc/mips-sde-elf/4.7.1/../../../../mips-sde-elf/bin/as -G 0 -EL -mips32r2 -O2 -no-mdebug -mabi=32 -march=mips32r2 -mtune=4kem --trap -G 0 -o Coach12p/RfiUiAssetsCompiled1.o /var/folders/mk/0mblc5810cjgs0nylrkjxqbm0000gq/T/RfiUiAssetsCompiled1-BmjBFI.s > For the MIPS-specific flags, I don't think there's an equivalent; > please file bugs if it's a...
2012 Aug 16
0
[LLVMdev] MIPS & GP register
...tables -c -o Coach12p/RfiUiAssetsCompiled1.o > -G 0 -x assembler > /var/folders/mk/0mblc5810cjgs0nylrkjxqbm0000gq/T/RfiUiAssetsCompiled1-BmjBFI.s > > /usr/local/lytro/lib/gcc/mips-sde-elf/4.7.1/../../../../mips-sde-elf/bin/as > -G 0 -EL -mips32r2 -O2 -no-mdebug -mabi=32 -march=mips32r2 -mtune=4kem > --trap -G 0 -o Coach12p/RfiUiAssetsCompiled1.o > /var/folders/mk/0mblc5810cjgs0nylrkjxqbm0000gq/T/RfiUiAssetsCompiled1-BmjBFI.s That's weird... you're probably triggering some sort of bad case in the driver logic which tries...
2016 Jul 05
2
Representing MIPS ABI information in the triple as ARM/X86 do for EABI/EABIHF/X32
...for this in gcc yet either. > echristo at dzur ~/b/build-gcc-mips64abin64> .../configure --target=mips64-linux-gnuabi64 --enable-languages=c > echristo at dzur ~/tmp> ~/builds/build-gcc-mips64abin64/gcc/cc1 foo.c -o - > .file 1 "foo.c" > .section .mdebug.abiN32 It's true that upstream GCC doesn't know about this triple yet but that's because downstream users of GCC don't need to push their changes upstream when they redefine triples. Fedora and Gentoo both use --with-abi while Debian uses source patches. Upstream GCC only contains...
2016 Jun 24
7
Representing MIPS ABI information in the triple as ARM/X86 do for EABI/EABIHF/X32
Hi, Having recently enabled IAS by default for the MIPS O32 ABI, I'm now trying to do the same thing for the MIPS N64 ABI. Unfortunately, it is not currently possible to enable IAS by default for the N64 ABI without also enabling it for the N32 ABI because this information is not reflected in the triple and that's the only information MipsMCAsmInfo has. This would be fine if it N32 was
2013 Feb 19
0
[LLVMdev] Is va_arg correct on Mips backend?
Which part of the generated code do you think is not correct? Could you be more specific? I compiled this program with clang and ran it on a mips board. It returns the expected result (21). On Tue, Feb 19, 2013 at 4:15 AM, Jonathan <gamma_chen at yahoo.com.tw> wrote: > I check the Mips backend for the following C code fragment compile result. > It seems not correct. Is it my
2013 Feb 19
2
[LLVMdev] Is va_arg correct on Mips backend?
I check the Mips backend for the following C code fragment compile result. It seems not correct. Is it my misunderstand or it's a bug. //ch8_3.cpp #include <stdarg.h> int sum_i(int amount, ...) { int i = 0; int val = 0; int sum = 0; va_list vl; va_start(vl, amount); for (i = 0; i < amount; i++) { val = va_arg(vl, int); sum += val; } va_end(vl);
2012 Aug 16
0
[LLVMdev] MIPS & GP register
On Wed, Aug 15, 2012 at 10:17 PM, Carl Norum <carl at lytro.com> wrote: >> -march=mips32r2 >> -mtune=4kem >> -msoft-float >> -EL >> >> -Xclang -triple -Xclang mipsel-sde-elf >> -Xclang -mrelocation-model -Xclang static >> >> -Xclang -mllvm -Xclang -mips-ssection-threshold=0 >> -Xclang -mllvm -Xclang
2013 Feb 04
0
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
On Mon, Feb 4, 2013 at 1:09 PM, <nkavv at physics.auth.gr> wrote: > Hi Justin, > > > Has anyone had similar problems with the NVPTX backend? Shouldn't this >>> code be linked to the AsmPrinter library for NVPTX (already)? >>> >> >> What do you mean by "doesn't work"? The AsmPrinter library really houses >> the MCInst
2012 Aug 16
2
[LLVMdev] MIPS & GP register
Hi LLVM MIPS people, I've been trying to keep track of the MIPS backend in order to eventually switch to clang/llvm from GCC for building our camera software. We've been using a build at revision 156432 for some time with no problems. I synced up to TOT clang/llvm today (revision 162004) to see if any optimizations had been improved, etc. The build I made with it started crashing
2013 Feb 04
3
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
Hi Justin, >> Has anyone had similar problems with the NVPTX backend? Shouldn't this >> code be linked to the AsmPrinter library for NVPTX (already)? > > What do you mean by "doesn't work"? The AsmPrinter library really houses > the MCInst printer, which isn't implemented for NVPTX yet. The older > assembly printer works just fine. This is