search for: md_clear

...ion: __user pointer sanitization /sys/devices/system/cpu/vulnerabilities/spectre_v2 : Mitigation: Full generic retpoline, STIBP: disabled, RSB filling Despite having relevant microcode, I am still seeing the box as showing vulnerable to meltdown, speculative store bypass (ssbd), as well as MDS via MD_CLEAR mitigation. When I mount the debugfs, the flag for ibrs is missing - preventing me enabling it as a mitigation for ssbd (due to lack of relevant cpu flag): # mount -t debugfs none /sys/kernel/debug/ # ls -lahtr /sys/kernel/debug/x86/ibrs_enabled ls: cannot access /sys/kernel/debug/x86/ibrs_enab...

...pb stibp tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx rdseed adx smap clflushopt in > >> > tel_pt xsaveopt xsavec xgetbv1 xsaves dtherm ida arat pln pts hwp hwp_notify hwp_act_window hwp_epp md_clear flush_l1d > >> > > >> > > >> > > >> > Here is the CPU part from virsh dumpxml of my ovirt hypervisor > >> > <cpu mode='custom' match='exact' check='full'> > >> > <model fallback='forbid...

...ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm cpuid_fault epb invpcid_single pti ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid xsaveopt dtherm ida arat pln pts md_clear flush_l1d cpufreq *-pci description: Host bridge product: Haswell-ULT DRAM Controller vendor: Intel Corporation physical id: 100 bus info: pci@0000:00:00.0 version: 0b width: 32 bits clock: 33MHz configur...