Displaying 5 results from an estimated 5 matches for "md00087".
2016 Jan 14
2
[v3,11/41] mips: reuse asm-generic/barrier.h
On Thu, Jan 14, 2016 at 12:46:43PM -0800, Leonid Yegoshin wrote:
> On 01/14/2016 12:15 PM, Peter Zijlstra wrote:
> >On Thu, Jan 14, 2016 at 11:42:02AM -0800, Leonid Yegoshin wrote:
> >>An the only point - please use an appropriate SYNC_* barriers instead of
> >>heavy bold hammer. That stuff was design explicitly to support the
> >>requirements of
2016 Jan 14
2
[v3,11/41] mips: reuse asm-generic/barrier.h
On Thu, Jan 14, 2016 at 12:46:43PM -0800, Leonid Yegoshin wrote:
> On 01/14/2016 12:15 PM, Peter Zijlstra wrote:
> >On Thu, Jan 14, 2016 at 11:42:02AM -0800, Leonid Yegoshin wrote:
> >>An the only point - please use an appropriate SYNC_* barriers instead of
> >>heavy bold hammer. That stuff was design explicitly to support the
> >>requirements of
2016 Jan 14
0
[v3,11/41] mips: reuse asm-generic/barrier.h
...least 1.5 year, and the only significant point is that
>> MIPS CPU Arch doesn't have yet smp_read_barrier_depends() and
>> smp_rmb() should be used instead.
> Is SYNC_ACQUIRE a memory-barrier instruction that orders prior loads
> against later loads and stores?
Yes, it is in MD00087 (table 6.6 of document Ver 6.04) -
https://imgtec.com/?do-download=4302
> If so, and if MIPS does not do
> ordering based on address and data dependencies, I suggest making
> read_barrier_depends() be a SYNC_ACQUIRE rather than SYNC_RMB.
I understood that, after I see the example of...
2016 Jan 14
1
[v3,11/41] mips: reuse asm-generic/barrier.h
...gnificant point is that
> >>MIPS CPU Arch doesn't have yet smp_read_barrier_depends() and
> >>smp_rmb() should be used instead.
>
> >Is SYNC_ACQUIRE a memory-barrier instruction that orders prior loads
> >against later loads and stores?
>
> Yes, it is in MD00087 (table 6.6 of document Ver 6.04) -
> https://imgtec.com/?do-download=4302
OK, it does look like it should work. Of course, if you can rely
on straight address/data dependencies, that would be even better.
> > If so, and if MIPS does not do
> >ordering based on address and data d...
2016 Jan 14
1
[v3,11/41] mips: reuse asm-generic/barrier.h
...gnificant point is that
> >>MIPS CPU Arch doesn't have yet smp_read_barrier_depends() and
> >>smp_rmb() should be used instead.
>
> >Is SYNC_ACQUIRE a memory-barrier instruction that orders prior loads
> >against later loads and stores?
>
> Yes, it is in MD00087 (table 6.6 of document Ver 6.04) -
> https://imgtec.com/?do-download=4302
OK, it does look like it should work. Of course, if you can rely
on straight address/data dependencies, that would be even better.
> > If so, and if MIPS does not do
> >ordering based on address and data d...