search for: mctargetasmparser

...AvailableFeatures(unsigned long) const'* collect2: error: ld returned 1 exit status ---------------- and here is the code that it refers to: TestAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser, const MCInstrInfo &MII, const MCTargetOptions &Options) : MCTargetAsmParser(), STI(sti), Parser(parser) { // Initialize the set of available features. setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits())); } Destructors for both TestAsmParser and MCTargetAsmParser class are available. I am using CMake. I added the following lines to AsmParser/...

...couple of module asms, I get a segfault in ARMAsmParser::parseDirectiveFnStart because getTargetStreamer returns NULL. Frankly, I don't see how this is supposed to work because as far as I understood LTOModule::addAsmGlobalSymbols only creates a RecordStreamer which is then attached to the MCTargetAsmParser, and no TargetStreamer is ever created. The places that explicitly call createAsmStreamer are only writing assembly as llvm-mc or cc1as. I've tried to follow that scheme in addAsmGlobalSymbols but failed. Any ideas? Andrey

...nd to support AsmParser, but it hasn't the red part as below. I find the Mips has this. Do you know how to make it appear? Jonathan #ifdef GET_ASSEMBLER_HEADER #undef GET_ASSEMBLER_HEADER // This should be included into the middle of the declaration of // your subclasses implementation of MCTargetAsmParser. unsigned ComputeAvailableFeatures(uint64_t FeatureBits) const; void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, const SmallVectorImpl<MCParsedAsmOperand*> &Operands); void convertToMapAndConstraints(unsigned Kind,...

...left by 1 with optional rounding and optional saturation r0 = cmpy(r1, r2):<<1:rnd:sat Hardware loops ended by optional packet suffix { r0 = r1 }:endloop0:endloop1 We found the Hexagon grammar to be straight forward to implement using plain lex / parse but harder within the MCTargetAsmParser. We were thinking a way to get the grammar to work would involve modifying tablegen and the main asm parser loop. We'd have to make tablegen break down each instructions in to a sequence of tokens and build a sorted matching table based on the set of these sequences. The matching loop wo...

...expanded pseudos as input, which fails. So, my target >> must generate .s files and assemble as a separate step. > > It sounds like you're doing the expansion directly in the InstPrinter. I probably used the term 'expansion' incorrectly. Pseudos go 1:1 into .s files, then MCTargetAsmParser does its job. This class nicely consolidates tblgen's auto-generated operand fitting logic, which for me is quite a blob of code. Should use of the integrated assembler require targets to pick all machine instructions some other way? If the answer should be no, then handling pseudos via thei...

...39;t the red part > as below. I find the Mips has this. Do you know how to make it appear? > > Jonathan > > #ifdef GET_ASSEMBLER_HEADER > #undef GET_ASSEMBLER_HEADER > // This should be included into the middle of the declaration of > // your subclasses implementation of MCTargetAsmParser. > unsigned ComputeAvailableFeatures(uint64_t FeatureBits) const; > void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, > const SmallVectorImpl<MCParsedAsmOperand*> &Operands); > void convertToMapAndConstraints(unsigned Kind, &gt...

Resending, any pointers are much appreciated. On 5/7/2012 11:16 PM, Ashok Nalkund wrote: > > > On 5/7/2012 10:17 PM, Bendersky, Eli wrote: > <snip> >>>> $lli -entry-function="ISimEngine_GetVersion" -use-mcjit libengine.bc >>>> LLVM ERROR: Inline asm not supported by this streamer because we don't >>>> have an asm parser for this

On 5/7/2012 10:17 PM, Bendersky, Eli wrote: <snip> >>> $lli -entry-function="ISimEngine_GetVersion" -use-mcjit libengine.bc >>> LLVM ERROR: Inline asm not supported by this streamer because we don't >>> have an asm parser for this target >> >> I also tried other variations of the call with the same result: >>> $lli

Thanks you. I'm new to LLVM backend, so the help is much appreciated. On Sat, Oct 24, 2015 at 2:12 AM, Matt Arsenault <arsenm2 at gmail.com> wrote: > > > On Oct 23, 2015, at 3:36 AM, 李弘宇 via llvm-dev <llvm-dev at lists.llvm.org> > wrote: > > > The first line has the following error message: > > > > sop1-playground.s:1:15: error: invalid immediate:

Short version: If the integrated assembler accepted assembly strings as input, more targets could take advantage of integrated assembly. The longer version: For a given assembly statement, my out-of-tree target has complex instruction selection logic -- more so than the in-tree targets. This target uses variable length instructions and a laborious hierarchy of tblgen AsmOperands to do the job.

...llows ':' in register assignment statements. An example would be, "r5:4 = r3:2" or "r5:4 = combine(r3, r2)" either of which will assign the contents of registers 3 and 2 to registers 5 and 4 respectively. I would like to add method, "colonIsLabel()" to the MCTargetAsmParser and then let this target defined method look at the statement. If it is not a label then break and let parseInstruction handle the statement otherwise treat it as a label. I have not seen any replies to your RFC but do you feel like this approach would be reasonable. Given the irregularities...

...vm/MC/MCCodeEmitter.h" #include "llvm/MC/MCInstPrinter.h" #include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCObjectFileInfo.h" @@ -26,7 +25,6 @@ #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCSubtargetInfo.h" #include "llvm/MC/MCTargetAsmParser.h" -#include "llvm/MC/SubtargetFeature.h" #include "llvm/ADT/OwningPtr.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/FileUtilities.h" @@ -40,7 +38,6 @@ #include "llvm/Support/Signals.h" #include "llvm/Support/TargetR...

Hi all, I am proposing the integration of a backend targeting the RISC-V ISA. RISC-V is a free and open instruction set architecture that was originally developed at UC Berkeley. Future development of the ISA specification will be handled by the 501(c)(6) non-profit RISC-V Foundation and its members <https://riscv.org/membership/?action=viewlistings>. You can find much more information at

...for Release+Asserts build llvm[2]: Compiling ArgList.cpp for Release+Asserts build llvm[2]: Compiling LexicalScopes.cpp for Release+Asserts build llvm[3]: Compiling MCAsmParserExtension.cpp for Release+Asserts build llvm[2]: Compiling COFFObjectFile.cpp for Release+Asserts build llvm[3]: Compiling MCTargetAsmParser.cpp for Release+Asserts build llvm[2]: Compiling OptTable.cpp for Release+Asserts build llvm[3]: Building Release+Asserts Archive Library libLLVMMCParser.a make[3]: Leaving directory '/home/NIKHILREDDY/WORK/LLVM_OBJ/lib/MC/MCParser' llvm[2]: Compiling ConstantPools.cpp for Release+Asserts b...