search for: mcoi

in llvm-3.6.2.src 1. when I put this around one of my instruction definitions in my target "InstrInfo.td" file, let TwoOperandAliasConstraint = "$dst = $rs1" in { } I do not see any TIED_TO in the generated GenInstrInfo.inc file for the OperandInfo used by the instruction, the question is what am I doing wrong ? 2. I've noticed that TwoOperandAliasConstraint

...RMSrcMem assumes register, memory, vvvv register if VEX_4VOp3 is true and assumes register, vvvv register, memory if VEX_4V is true. I just need to change the flag from VEX_4VOp3 to VEX_4V. There are a few places where we assume only the 2nd operand can be tied-to: Desc->getOperandConstraint(1, MCOI::TIED_TO) != -1 (hard-coded index 1) I will fix those to handle this instruction. Thanks, Manman On Jul 9, 2012, at 10:07 PM, Evan Cheng wrote: > > > On Jul 9, 2012, at 4:15 PM, Manman Ren <mren at apple.com> wrote: > >> >> I need to implement an instruction whi...

...r, memory, vvvv register if VEX_4VOp3 is true and > assumes register, vvvv register, memory if VEX_4V is true. > > I just need to change the flag from VEX_4VOp3 to VEX_4V. There are a few > places where we assume only the 2nd operand can be tied-to: > Desc->getOperandConstraint(1, MCOI::TIED_TO) != -1 (hard-coded index 1) > I will fix those to handle this instruction. > > Thanks, > Manman > > On Jul 9, 2012, at 10:07 PM, Evan Cheng wrote: > > > > > > > On Jul 9, 2012, at 4:15 PM, Manman Ren <mren at apple.com> wrote: > > > &gt...

On Jul 9, 2012, at 4:15 PM, Manman Ren <mren at apple.com> wrote: > > I need to implement an instruction which has 2 read-write registers, so I added > let Constraints = "$src1 = $dst, $mask = $mask_wb" in { > ... > def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst, VR128:$mask_wb), > (ins VR128:$src1, v128mem:$src2, VR128:$mask), > ... > }

I need to implement an instruction which has 2 read-write registers, so I added let Constraints = "$src1 = $dst, $mask = $mask_wb" in { ... def rm : AVX28I<opc, MRMSrcMem, (outs VR128:$dst, VR128:$mask_wb), (ins VR128:$src1, v128mem:$src2, VR128:$mask), ... } There is a problem since MRMSrcMem assumes the 2nd physical operand is a memory operand. See the section about